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BCM43362KUBG Datasheet, PDF (73/84 Pages) Cypress Semiconductor – Single-Chip IEEE 802.11™ b/g/n MAC/Baseband/Radio + SDIO
BCM43362 Data Sheet
CLDO
CLDO
Table 21: CLDO
Specification
Input supply voltage, Vin
Output current
Output voltage, Vo
Dropout voltage
Output voltage DC accuracy
Quiescent current
Line regulation
Load regulation
Notes
Min = 1.25 + 0.2V = 1.45V.
Dropout voltage requirement
must be met under max load.
–
Programmable in 25 mV
steps
At max load
Include line/load regulation
Vin > Vo + 0.2V
No-load
Vin from (Vo + 0.2V) to 2V,
max load
Load from 1 mA to 150 mA
Minimum
1.45
–
1.075
–
–4
–
–0.2
–
Typical
1.5
–
1.2
–
–
10
–
0.02
Leakage current
PSRR
Start-up time
LDO turn-on time
In-rush current during turn-on
External output capacitor, Co
(nominal values)
External input capacitor
(nominal values)
Power-down
–
@1 kHz, Vin 1.5V,
20
Co = 1–2.2 µF
From full-chip power downa –
LDO turn-on time when
–
rest of chip is up
From its output capacitor in fully –
discharged state
Ceramic, X5R, 0402,
–
(ESR: 30 mΩ–200 mΩ), ±10%,
10V
Only use an external
–
input cap at VDD_LDO
pin if it is not supplied
from CBUCK output.
Ceramic, X5R, 0402, (ESR:
30 mΩ–200 mΩ), ±10%, 10V
a. With CBUCK soft-starting concurrently.
–
40
1250
–
–
2.2
1
Maximum Units
2.0
Volts
150
1.325
200
+4
15
+0.2
0.05
10
–
1400
180
150
–
mA
Volts
mV
%
µA
%Vo/V
%Vo/
mA
µA
dB
µs
µs
mA
µF
2.2
µF
Broadcom®
February 13, 2015 • 43362-DS106-R
IEEE 802.11 b/g/n MAC/Baseband/Radio + SDIO
Page 72
BROADCOM CONFIDENTIAL