EP9312 Datasheet, PDF (9/62 Pages) Cirrus Logic – Universal Platform System-on-chip Processor

EP9312
Universal Platform SOC Processor
receive and a 16 byte FIFO for transmit. Interrupts are
generated on Rx, Tx and modem status change.
• UART2 contains an IrDA encoder operating at either
the slow (up to 115 Kbps), medium (0.576 or 1.152
Mbps), or fast (4 Mbps) IR data rates. It also has a 16
byte FIFO for receive and a 16 byte FIFO for transmit.
• UART3 supports HDLC and includes a 16 byte FIFO
for receive and a 16 byte FIFO for transmit. Interrupts
are generated on Rx and Tx.
Table I. Universal Asynchronous Receiver/Transmitters Pin
Assignments
Pin Mnemonic
Pin Name - Description
TXD0
RXD0
CTSn
DSRn / DCDn
DTRn
RTSn
EGPIO[0] / RI
TXD1 / SIROUT
RXD1 / SIRIN
TXD2
RXD2
EGPIO[3] / TENn
UART1 Transmit
UART1 Receive
UART1 Clear To Send /
Transmit Enable
UART1 Data Set Ready /
Data Carrier Detect
UART1 Data Terminal Ready
UART1 Ready To Send
UART1 Ring Indicator
UART2 Transmit /
IrDA Output
UART2 Receive / IrDA Input
UART3 Transmit
UART3 Receive
HDLC3 Transmit Enable
Triple-port USB Host
The USB Open Host Controller Interface (Open HCI)
provides full-speed serial communications ports at a
baud rate of 12 Mbits/sec. Up to 127 USB devices
(printer, mouse, camera, keyboard, etc.) and USB hubs
can be connected to the USB host in the USB “tiered
star” topology.
This includes the following features:
• Compliance with the USB 2.0 specification
• Compliance with the Open HCI Rev 1.0 specification
• Supports both low speed (1.5 Mbps) and full speed
(12 Mbps) USB device connections
• Root HUB integrated with 3 downstream USB ports
• Transceiver buffers integrated, over-current protection
on ports
• Supports power management
• Operates as a master on the bus
The Open HCI host controller initializes the master DMA
transfer with the AHB bus:
• Fetches endpoint descriptors and transfer descriptors
• Accesses endpoint data from system memory
• Accesses the HC communication area
• Writes status and retire transfer descriptor
Table J. Triple Port USB Host Pin Assignments
Pin Mnemonic
Pin Name - Description
USBp[2:0]
USBm[2:0]
USB Positive signals
USB Negative Signals
Two-wire Interface
The two-wire interface provides communication and
control for synchronous-serial-driven devices.
Table K. Two-Wire Port with EEPROM Support Pin Assignments
Pin Mnemonic Pin Name - Description
Alternative
Usage
EECLK
EEDATA
Two-wire Interface Clock
Two-wire Interface Data
General
Purpose I/O
General
Purpose I/O
Real-time Clock with Software Trim
The software trim feature on the real time clock (RTC)
provides software controlled digital compensation of the
32.768 KHz input clock. This compensation is accurate to
± 1.24 sec/month.
Note: A real time clock must be connected to RTCXTALI or
the EP9312 device will not boot.
Table L. Real-Time Clock with Pin Assignments
Pin Mnemonic
Pin Name - Description
RTCXTALI
RTCXTALO
Real-Time Clock Oscillator Input
Real-Time Clock Oscillator Output
PLL and Clocking
The Processor and the Peripheral Clocks operate from a
single 14.7456 MHz crystal.
The Real Time Clock operates from a 32.768 KHz
external oscillator.
DS515PP7
©Copyright 2005 Cirrus Logic (All Rights Reserved)
9