EP9312 Datasheet, PDF (52/62 Pages) Cirrus Logic – Universal Platform System-on-chip Processor

EP9312
Universal Platform SOC Processor
JTAG
Parameter
TCK clock period
TCK clock high time
TCK clock low time
TMS / TDI to clock rising setup time
Clock rising to TMS / TDI hold time
JTAG port clock to output
JTAG port high impedance to valid output
JTAG port valid output to high impedance
Symbol
t_{clk_per}
t_{clk_high}
t_{clk_low}
t_JPs
t_JPh
t_JPco
t_JPzx
t_JPxz
Min
100
50
50
20
45
-
-
-
Max
-
-
-
-
-
30
30
30
Units
ns
ns
ns
ns
ns
ns
ns
ns
TMS
TDI
TCK
t_{clk_per}
t_{clk_high}
t_{clk_low}
TDO
t_JPzx
t_JPs
t_JPco
t_JPh
t_JPxz
Figure 37. JTAG Timing Measurement
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