EP9312 Datasheet, PDF (49/62 Pages) Cirrus Logic – Universal Platform System-on-chip Processor

AC’97
Parameter
ABITCLK input cycle time
ABITCLK input high time
ABITCLK input low time
ABITCLK input rise/fall time
ASDI setup to ABITCLK falling
ASDI hold after ABITCLK falling
ASDI input rise/fall time
ABITCLK rising to ASDO / ASYNC valid, C_L = 55 pF
ASYNC / ASDO rise/fall time, C_L = 55 pF
EP9312
Universal Platform SOC Processor
Symbol
t_{clk_per}
t_{clk_high}
t_{clk_low}
t_clkrf
t_s
t_h
t_rfin
t_co
t_rfout
Min
-
36
36
2
10
10
2
2
2
Typ
81.4
-
-
-
-
-
-
-
-
Max
-
45
45
6
-
-
6
15
6
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
t_{clk_per}
ABITCLK
t_clkrf
t_{clk_high} t_{clk_low}
t_clkrf
ASDI
t_h
t_s
t_rfin
ASDO
ASYNC
t_rfout
t_co
t_co
t_rfout
Figure 34. AC ‘97 Configuration Timing Measurement
t_co
t_rfout
DS515PP7
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