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| EP9312 Datasheet, PDF (29/62 Pages) Cirrus Logic – Universal Platform System-on-chip Processor | |||
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EP9312
Universal Platform SOC Processor
Static Memory Turnaround Cycle
Parameter
Symbol
Min
CSnX deassert to CSnY assert time
tBTcyc
-
Typ
tHCLK Ã (IDCY+1)
Max
-
Unit
ns
Notes: 1. X and Y represent any two chip select numbers.
2. IDCY occurs on read-to-write and write-to-read.
3. IDCY is honored when going from a asynchronous device (CSx) to a synchronous device (/SDCSy).
AD
CSnX
CSnY
WRn
RDn
DQMn
DA
WAIT
tBTcyc
Figure 16. Static Memory Turnaround Cycle Timing Measurement
DS515PP7
©Copyright 2005 Cirrus Logic (All Rights Reserved)
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