EP9312 Datasheet, PDF (13/62 Pages) Cirrus Logic – Universal Platform System-on-chip Processor

EP9312
Universal Platform SOC Processor
DC Characteristics
(T_A = 0 to 70° C; CVDD = VDD_PLL = 1.8; RVDD = 3.3 V;
All grounds = 0 V; all voltages with respect to 0 V unless otherwise noted)
High level output voltage
Low level output voltage
High level input voltage
Low level input voltage
High level leakage current
Low level leakage current
Parameter
Iout = -4 mA
Iout = 4 mA
Vin = 3.3 V
Vin = 0
(Note 4)
(Note 5)
(Note 5)
(Note 5)
(Note 5)
Symbol
V_oh
V_ol
V_ih
V_il
I_ih
I_il
Min
Max
0.85 × RVDD
-
-
0.15 × RVDD
0.65 × RVDD VDD + 0.3
-0.3
0.35 × RVDD
-
10
-
-10
Unit
V
V
V
V
µA
µA
Parameter
Power Supply Pins (Outputs Unloaded)
Power Supply Current:
CVDD / VDD_PLL Total
RVDD
Low-Power Mode Supply Current
CVDD / VDD_PLL Total
RVDD
Min
Typ
Max
-
190
240
-
45
80
-
2
3.5
-
1.0
2
Unit
mA
mA
mA
mA
Note:
4. For open drain pins, high level output voltage is dependent on the external load.
5. All inputs that do not include internal pull-ups or pull-downs, must be externally driven for proper operation (See Table S on
page 59). If an input is not driven, it should be tied to power or ground, depending on the particular function. If an I/O pin is not
driven and programmed as an input, it should be tied to power or ground through its own resistor.
DS515PP7
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