EP9312 Datasheet, PDF (57/62 Pages) Cirrus Logic – Universal Platform System-on-chip Processor

Ball
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
E1
E2
E3
E4
E5
E6
E7
E8
Signal
AD[20]
DA[29]
DD[10]
DD[6]
DD[2]
MDC
MIIRXD[3]
TXCLK
MIITXD[0]
NC
NC
NC
NC
NC
NC
USBP[2]
IORDY
DMACKN
AD[24]
DA[25]
DD[11]
SDCLKEN
AD[19]
DD[9]
DD[5]
AD[16]
MIIRXD[2]
MIITXD[3]
TXEN
NC
NC
NC
EGPIO[14]
NC
USBM[2]
ARSTN
DIORN
EGPIO[1]
AD[23]
DA[23]
DA[26]
CSN[6]
GND
GND
CVDD
CVDD
DS515PP7
EP9312
Universal Platform SOC Processor
Ball
H5
H8
H9
H10
H11
H12
H13
H16
H17
H18
H19
H20
J1
J2
J3
J4
J5
J8
J9
J10
J11
J12
J13
J16
J17
J18
J19
J20
K1
K2
K3
K4
K5
K8
K9
K10
K11
K12
K13
K16
K17
K18
K19
K20
L1
L2
Signal
CVDD
GND
GND
GND
GND
GND
GND
RVDD
RTCXTALO
ADC_VDD
ADC_GND
XP
DA[21]
DQMN[0]
DQMN[1]
DQMN[2]
GND
GND
GND
GND
GND
GND
GND
CVDD
RTCXTALI
XM
YP
YM
AD[22]
DA[20]
AD[21]
DA[19]
RVDD
GND
GND
GND
GND
GND
GND
CVDD
SYM
SYP
SXM
SXP
DA[18]
DA[17]
Ball
N15
N16
N17
N18
N19
N20
P1
P2
P3
P4
P5
P6
P15
P16
P17
P18
P19
P20
R1
R2
R3
R4
R5
R6
R7
R8
R13
R14
R15
R16
R17
R18
R19
R20
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T11
T12
Signal
GND
GND
XTALO
COL[0]
COL[1]
COL[2]
AD[4]
DA[10]
DA[9]
BRIGHT
RVDD
RVDD
RVDD
RVDD
XTALI
PLL_VDD
ROW[6]
ROW[7]
AD[2]
AD[1]
P[17]
P[14]
RVDD
RVDD
GND
CVDD
CVDD
GND
RVDD
RVDD
ROW[0]
ROW[3]
PLL_GND
ROW[5]
DA[8]
BLANK
P[13]
SPCLK
V_CSYNC
DD[14]
GND
CVDD
RVDD
GND
GND
RVDD
©Copyright 2005 Cirrus Logic (All Rights Reserved)
Ball
V15
V16
V17
V18
V19
V20
W1
W2
W3
W4
W5
W6
W7
W8
W9
W10
W11
W12
W13
W14
W15
W16
W17
W18
W19
W20
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y17
Y18
Y19
Y20
Signal
SSPTX1
INT[2]
RTSN
USBP[0]
CTSN
TXD[0]
P[12]
P[9]
DD[0]
P[5]
P[3]
DA[7]
DA[5]
AD[11]
AD[9]
IDECS1N
IDEDA[1]
TCK
TMS
EECLK
SCLK1
GRLED
INT[3]
SLA[1]
SLA[0]
RXD[2]
HSYNC
DD[1]
DD[12]
P[2]
AD[15]
DA[6]
DA[4]
AD[10]
DA[1]
AD[8]
IDEDA[0]
DTRN
TDO
BOOT[0]
EEDAT
ASDO
SFRM1
RDLED
USBP[1]
ABITCLK
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