CS42L55 Datasheet, PDF (66/73 Pages) Cirrus Logic – Ultra Low Power, Stereo CODEC w/Class H Headphone Amp

CS42L55
6.33.3 Limiter Soft Ramp Disable
Configures an override of the digital soft ramp setting.
LIMSRDIS
0
1
Limiter Soft Ramp Disable
OFF; Limiter Attack Rate is dictated by the DIGSFT (“Digital Soft Ramp” on page 46) setting
ON; Limiter volume changes take effect in one step, regardless of the DIGSFT setting.
6.34 Status (Address 29h) (Read Only)
For bits [6:0] in this register, a “1” means the associated error condition has occurred at least once since the
register was last read. A”0” means the associated error condition has NOT occurred since the last reading
of the register. Reading the register resets these bits to 0.
7
HPDETECT
6
SPCLKERR
5
DSPBOVFL
4
DSPAOVFL
3
MIXBOVFL
2
MIXAOVFL
1
ADCBOVFL
0
ADCAOVFL
6.34.1 HPDETECT Pin Status (Read Only)
Indicates the status of the HPDETECT pin.
HPDETECT
0
1
Pin State
Low
High
6.34.2 Serial Port Clock Error (Read Only)
Indicates the status of the MCLK to LRCK ratio.
SPCLKERR
0
1
Application:
Serial Port Clock Status:
MCLK/LRCK ratio is valid.
MCLK/LRCK ratio is not valid.
“Serial Port Clocking” on page 34
Note: On initial power up and application of clocks, this bit will report ‘1’b as the serial port re-synchro-
nizes.
6.34.3 DSP Engine Overflow (Read Only)
Indicates the over-range status in the DSP data path.
DSPxOVFL
0
1
DSP Overflow Status:
No digital clipping has occurred in the data path after the DSP.
Digital clipping has occurred in the data path after the DSP.
6.34.4 MIXx Overflow (Read Only)
Indicates the over-range status in the PCM mix data path.
MIXxOVFL
0
1
PCM Overflow Status:
No digital clipping has occurred in the data path of the ADC and PCM mix of the DSP.
Digital clipping has occurred in the data path of the ADC and PCM mix of the DSP.
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