CS42L55 Datasheet, PDF (21/73 Pages) Cirrus Logic – Ultra Low Power, Stereo CODEC w/Class H Headphone Amp

CS42L55
POWER CONSUMPTION - ALL SUPPLIES = 2.5 V
Power Ctl. Registers MUX Registers
Typical Current (mA)
Operation Test Condi-
tions (unless otherwise
specified): /All zeros input,
slave mode, sample rate =
48 kHz; No load. Refer to
Figure 8 on page 19.
02h page 42
03hpage 43
08h page 46
i_VCP
i_VA
i_VLDO
i_VL
Class H
Mode
page 45
Total
Power
(mW)
1 Off (Note 23)
x x x x x x x x x x xxxxx
2 Standby
MCLKDIS=1 x x x 1 x x x x x x x x x x x
MCLKDIS=0 x x x 1 x x x x x x x x x x x
(Note 23) MCLKDIS=x x x x 1 x x x x x x x x x x x
3 Mono Record (Note 24) ADC 1 1 0 0 11 11 11 11 xx 01 x x x x x
PGA to ADC 1 1 0 0 11 11 11 11 xx 00 x x x x x
4 Stereo Record (Note 24) ADC 1 0 0 0 11 11 11 11 01 01 x x x x x
PGA to ADC 1 0 0 0 11 11 11 11 00 00 x x x x x
5 Mono Play to HP
No Effects 1 1 1 0 11 10 11 11 xx xx x x x 0 1
Effects 1 1 1 0 11 10 11 11 xx xx x x x 0 0
6 Mono Play to Line No Effects 1 1 1 0 11 11 11 10 xx xx x 0 x x 1
Effects 1 1 1 0 11 11 11 10 xx xx x 0 x x 0
7 Stereo Play to HP No Effects 1 1 1 0 10 10 11 11 xx xx x x 0 0 1
Effects ^{1 1 1 0 10 10 11 11 xx xx x x 0 0 0}
8 Stereo Play to Line No Effects 1 1 1 0 11 11 10 10 xx xx 0 0 x x 1
Effects 1 1 1 0 11 11 10 10 xx xx 0 0 x x 0
9 Stereo Passthrough to HP
1 1 1 0 10 10 11 11 xx xx x x 1 1 x
10 Stereo Passthrough to Line
1 1 1 0 11 11 10 10 xx xx 1 1 x x x
11 Mono Rec. & Play
PGA In, HP Out
No Effects 1 1 0 0 11 10 11 11 xx 00 x x x 0 1
Effects ^{1 1 0 0 11 10 11 11 xx 00 x x x 0 0}
12 Stereo Rec. & Play
PGA In, HP Out
No Effects 1 0 0 0 10 10 11 11 00 00 x x 0 0 1
Effects ^{1 0 0 0 10 10 11 11 00 00 x x 0 0 0}
- 0.001 0.001 0.001 0.000
- 0.000 0.000 0.064 0.007
- 0.000 0.013 0.385 0.007
- 0.000 0.000 0.018 0.000
- 0.000 0.752 0.743 0.019
- 0.000 0.997 0.750 0.019
- 0.000 1.031 0.918 0.025
- 0.000 1.511 0.926 0.024
VCP/2 0.676 1.327 0.705 0.007
VCP 1.694 1.339 0.709 0.007
VCP/2 0.677 1.325 1.032 0.007
VCP 1.728 1.337 1.049 0.007
VCP/2 _{0.585 1.328 0.738 0.007}
VCP _{1.516 1.339 0.739 0.007}
VCP/2 _{0.585 1.324 1.030 0.006}
VCP _{1.515 1.338 1.030 0.007}
VCP/2 _{0.943 1.833 0.711 0.007}
VCP _{2.250 1.850 0.744 0.007}
VCP/2 _{0.945 1.835 1.090 0.007}
VCP _{2.237 1.846 1.121 0.007}
VCP/2 _{0.760 1.835 0.730 0.007}
VCP _{1.888 1.848 0.740 0.006}
VCP/2 _{0.760 1.836 1.085 0.007}
VCP _{1.888 1.851 1.058 0.007}
VCP/2 _{0.751 1.174 0.212 0.007}
VCP _{1.880 1.188 0.212 0.007}
VCP/2 _{0.759 1.175 0.211 0.007}
VCP _{1.886 1.189 0.211 0.007}
VCP/2 _{0.676 2.055 1.159 0.018}
VCP _{1.700 2.068 1.196 0.018}
VCP/2 _{0.678 2.055 1.462 0.018}
VCP _{1.696 2.066 1.463 0.018}
VCP/2 _{0.945 3.071 1.340 0.024}
VCP _{2.254 3.089 1.358 0.023}
VCP/2 _{0.950 3.074 1.702 0.024}
VCP _{2.254 3.090 1.705 0.023}
0.01
0.18
1.01
0.05
3.79
4.42
4.94
6.15
6.79
9.37
7.60
10.30
6.65
9.00
7.36
9.73
8.74
12.13
9.69
13.03
8.33
11.21
9.22
12.01
5.36
8.22
5.38
8.23
9.77
12.46
10.53
13.11
13.45
16.81
14.38
17.68
Notes:
23. When “Off”, RESET pin and clock/data lines held LO; when in “standby”, lines are held HI.
24. Either inputs 1 or 2 may be selected. Input 1 is shown for simplicity.
DS773F1
21