CS4265_07 Datasheet, PDF (37/56 Pages) Cirrus Logic – 104 dB, 24-Bit, 192 kHz Stereo Audio CODEC

6.3.3
CS4265
De-Emphasis Control (Bit 1)
Function:
The standard 50/15 μs digital de-emphasis filter response, Figure 17, may be implemented for a sample
rate of 44.1 kHz when the DeEmph bit is configured as shown in Table 7. NOTE: De-emphasis is available
only in Single-Speed Mode.
DeEmph
0
1
Description
Disabled (default)
44.1 kHz de-emphasis
Table 7. De-Emphasis Control
Gain
dB
0dB
-10dB
T1=50 µs
T2 = 15 µs
F1
3.183 kHz
F2 Frequency
10.61 kHz
Figure 17. De-Emphasis Curve
6.4 ADC Control - Address 04h
7
FM1
6
FM0
5
4
3
2
1
0
Reserved
ADC_DIF
Reserved
MuteADC HPFFreeze
M/S
6.4.1 Functional Mode (Bits 7:6)
Function:
Selects the required range of sample rates.
FM1
0
0
1
1
FM0
0
1
0
1
Mode
Single-Speed Mode: 4 to 50 kHz sample rates
Double-Speed Mode: 50 to 100 kHz sample rates
Quad-Speed Mode: 100 to 200 kHz sample rates
Reserved
Table 8. Functional Mode Selection
6.4.2 ADC Digital Interface Format (Bit 4)
Function:
The required relationship between LRCK, SCLK and SDOUT is defined by the ADC Digital Interface For-
mat bit. The options are detailed in Table 9 and may be seen in Figure 5 and Figure 6.
DS657F2
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