CS4265_07 Datasheet, PDF (23/56 Pages) Cirrus Logic – 104 dB, 24-Bit, 192 kHz Stereo Audio CODEC

3. TYPICAL CONNECTION DIAGRAM
+3.3V to +5V
10 µF 0.1 µF
0.1 µF
+3.3V to +5V
0.1 µF 10 µF
CS4265
+1.8V
to +5V
0.1 µF
47 kΩ
Note 4
Digital Audio
Processor
Digital Audio
Output
Micro-
Controller
+1.8V
to +5V
2 kΩ 2 kΩ
Note 1
0.1 µF
Note 1: Resistors are required for I²C control
port operation
Note 3: The value of RL is dictated by the
microphone carteridge.
Note 4: Sets the LSB of the 7-bit chip address.
See the I²C Control Port Description and
Timing section.
VD VA
VLS
SDOUT
SDIN1
SDIN2
VA
MUTEC
AOUTA
AOUTB
Mute
Drive
3.3 µF
470Ω
10 kΩ
10 kΩ
*C
*_C
Optional
Analog
Muting
3.3 µF
470Ω
See Note 2
Rext
Rext
TXSDIN
CS4265
MCLK
SCLK
LRCK
Note 2 :
For best response to Fs/2 :
C
=
R_ext + 470
4πFs(R_ext × 470)
This circuitry is intended for applications where the CS4265
connects directly to an unbalanced output of the design . For internal
routing applications please see the DAC Analog Output
Characteristics section for loading limitations.
TXOUT
RST
SCL
SDA
AIN1A
SGND
AIN1B
MICIN1
10 µF _{100 Ω}
10 µF ^* 1800 pF 100 kΩ
* 1800 pF 100 kΩ
10 µF ^{100 Ω}
10 µF
Left Analog Input 1
Signal Ground
Right Analog Input 1
Microphone Input 1
MICIN2
10 µF
Microphone Input 2
VLC
MICBIAS
RL
RL
Note 3
FILT+
DGND
AGND
AGND
AFILTA
AFILTB
VQ
10 µF
0.1 µF 47 µF
*
*
2.2nF 2.2nF
0.1 µF
10 µF
* Capacitors must be C0G or equivalent
Figure 9. Typical Connection Diagram
DS657F2
23