CS4265_07 Datasheet, PDF (29/56 Pages) Cirrus Logic – 104 dB, 24-Bit, 192 kHz Stereo Audio CODEC

CS4265
4.11 Mute Control
The MUTEC pin becomes active during power-up initialization, reset, muting, if the MCLK to LRCK ratio is
incorrect, and during power-down. The MUTEC pin is intended to be used as control for an external mute
circuit in order to add off-chip mute capability.
Use of the Mute Control function is not mandatory but recommended for designs requiring the absolute min-
imum in extraneous clicks and pops. Also, use of the Mute Control function can enable the system designer
to achieve idle channel noise/signal-to-noise ratios which are only limited by the external mute circuit. The
MUTEC pin is an active-low CMOS driver. See Figure 14 for a suggested active-low mute circuit.
+V_EE
AOUT
LPF
CS4265
AC
Couple
560 Ω
-V_EE
47 kΩ
Audio
Out
MUTEC
+V_A
MMUN2111LT1
2 kΩ
10 kΩ
-V_EE
Figure 14. Suggested Active-Low Mute Circuit
4.12 AES3 Transmitter
The CS4265 includes an IEC60958-3 digital audio transmitter. A comprehensive buffering scheme provides
write access to the channel status data. This buffering scheme is described in the “Channel Status Buffer
Management” section on page 52.
The IEC60958-3 transmitter encodes and transmits audio and digital data according to the IEC60958-3
(S/PDIF) interface standard. The transmitter receives audio data from the input pin TXSDIN and control
clocks from the PCM Serial Interface. Audio and control data are multiplexed together and bi-phase mark
encoded. The resulting bit stream is driven from the output pin TXOUT to an output connector either directly
or through a transformer. The transmitter is clocked from the clock input pin MCLK.
The channel status (C) bits in the transmitted data stream are taken from storage areas within the CS4265.
The user can manually access the internal storage of the CS4265 to configure the transmitted channel sta-
tus data. The “Channel Status Buffer Management” section describes the method of manually accessing
the storage areas. The CS4265 transmits all ‘0’s in the user (U) data fields.
4.12.1 TxOut Driver
The line driver is a low skew, low impedance, single-ended output capable of driving cables directly. The
driver is set to ground during reset (RESET = LOW), when no transmit clock is provided, and optionally
DS657F2
29