CS4244 Datasheet, PDF (36/63 Pages) Cirrus Logic – 4 In/4 Out Audio CODEC with PCM and TDM Interfaces

CS4244
100 k
22 F
VA
100 k
470 pF
C0G
-
+
100 k
634 
91 
634 
100 k
0.01 F
22 F
470 pF
C0G
-
+
* Place close to AINx pins
634 
91 
2700 pF
C0G
*
ADC1-4
AINx+
AINx-
Figure 24. Single-Ended to Differential Active Input Filter
4.6.2.3 ADC HPF
The ADC path contains an optional HPF which can be enabled or disabled for all four ADCs via the “EN-
ABLE HPF” bit in the "ADC Control 1" register. The HPF should only be disabled when the DC component
of the input signal needs to be preserved in the digital output data. The HPF characteristics are given in
the ADC Digital Filter Characteristics table and plotted in Section 7. The Analog Input Characteristics ta-
bles on pages 12 and 13 specify the DC offset error when the HPF is enabled or disabled.
The following figure shows how the recommended single-ended to differential active input filter
(Figure 24) can be modified to allow for DC coupled inputs when the HPF is disabled. Note that the volt-
age swing should not exceed the ADC full-scale input specification.
100 k
VA
100 k
634 
470 pF
C0G
-
+
91 
634 
100 k
0.01 F
22 F
470 pF
C0G
-
+
* Place close to AINx pins
634 
91 
2700 pF
C0G
*
ADC1-4
AINx+
AINx-
Figure 25. Single-Ended to Differential Active Input Filter - DC Coupled Input Signal (VA/2 Centered)
DS900F2
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