CS4226_04 Datasheet, PDF (34/37 Pages) Cirrus Logic – Surround Sound Codec

CS4226
SCLK - Serial Port Clock I/O, PIN 38.
SCLK clocks digital audio data into the DACs via SDIN1/2/3, and clocks data out of the ADCs on
SDOUT1/2. Active clock edge depends on the DSCK bit.
LRCK - Left/Right Select Signal I/O, PIN 37.
The Left/Right select signal. This signal has a frequency equal to the sample rate. The relationship of
LRCK to the left and right channel data depends on the selected format.
DEM - De-emphasis Control, PIN 27.
When low, DEM controls the activation of the standard 50/15 µs de-emphasis filter for either 32, 44.1, or
48 kHz sample rates. This pin is enabled by the DEM2-0 bits in the Auxiliary Port Control Byte.
OVL/ERR - Overload Indicator, PIN 30.
This pin goes high if either of the stereo audio ADCs or the mono ADC is clipping. If the S/PDIF
receiver is chosen as the clock source (CS = 4, 5, 6, 7), then the pin also goes high if there is an error
in the Receiver Status Byte. Error and overloading can be masked using bits in the Input Control Byte.
Auxiliary Digital Audio and S/PDIF Receiver Signals
RX1 - Receiver Channel 1, PIN 42.
This pin is a dedicated S/PDIF input channel configured as the clock source for the device via the
CS2-0 bits.
DATAUX/RX4 - Auxiliary Data Input / Receiver Channel 4, PIN 1.
DATAUX is the auxiliary audio data input line, usually connected to an external digital audio source. As
RX4, this pin is configured as S/PDIF input channel 4 via the control port.
LRCKAUX/RX3 - Auxiliary Word Clock Input or Output / Receiver Channel 3, PIN 44.
In auxiliary slave mode, LRCKAUX is a word clock (at Fs) from an external digital audio source.
LRCKAUX can be used as the clock reference for the internal PLL. In auxiliary master mode, LRCKAUX
is a word clock output (at Fs) to clock an external digital audio source. As RX3, this pin is configured as
S/PDIF input channel 3 via the control port.
SCLKAUX/RX2 - Auxiliary Bit Clock Input or Output / Receiver Channel 2, PIN 43.
In auxiliary slave mode, SCLKAUX is the serial data bit clock from an external digital audio source, used to
clock in data on DATAAUX. In auxiliary master mode, SCLKAUX is a serial data bit clock output. As RX2,
this pin is configured as S/PDIF input channel 2 via the control port.
HOLD/RUBIT - S/PDIF Received User Bit / HOLD Control, PIN 2.
When the S/PDIF receiver is chosen as the clock source (CS = 4, 5, 6 and HPC = 1), then this pin
outputs the received user bit. When HPC = 0, this pin is sampled on the active edge of SCLKAUX. If it
is high any time during the frame, DATAUX data is ignored and the previous “good” sample is output to
the serial output port.
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DS188F4