CS4226_04 Datasheet, PDF (15/37 Pages) Cirrus Logic – Surround Sound Codec

CS4226
controller. The frequency of LRCK must be
equal to the system sample rate, Fs.
SDIN1, SDIN2, and SDIN3 are the data input
pins, each of which drive a pair of DACs.
SDOUT1 and SDOUT2 can carry the output
data from the two 20-bit ADC's, the mono
ADC, the auxiliary digital audio port, and the
S/PDIF receiver. Selection depends on the
IS1/0 bits in the ADC control byte. The audio
DSP port may also be configured so that all 6
DAC's data is input on SDIN1, and all 3 ADC's
data is output on SDOUT1. Table 4 outlines
the serial interface ports.
2.5.2 Audio DSP Serial Interface For-
mats
The audio DSP port supports 7 alternate for-
mats, shown in Figures 4, 5, and 6. These for-
mats are chosen through the DSP Port Mode
Byte with the DDF2/1/0 bits.
Formats 5 and 6 are single line data modes
where all DAC channels are combined onto a
single input and all ADC channels are com-
bined onto a single output. Format 6 is avail-
able in Master Mode only. See figure 6 for
details.
DAC Inputs
SDIN1
left channel
right channel
single line
SDIN2
left channel
right channel
SDIN3
left channel
right channel
DAC #1
DAC #2
All 6 DAC channels
DAC #3
DAC #4
DAC #5
DAC #6
Table 4. DSP Serial Interface Ports
FORMAT 0, 1, 2: LRCK
Format 0: M = 20
Format 1: M = 18
SCLK
Format 2: M = 16
SDIN
LSB
FORMAT 3:
LRCK
SCLK
SDIN
MSB
Left
MSB
LSB
M SCLKs
Left
LSB
MSB
Right
MSB
LSB
M SCLKs
Right
LSB
MSB
FORMAT 4:
LRCK
SCLK
SDIN
Left
MSB
LSB
Right
MSB
LSB
Note: SCLK shown for DSCK = 0. SCLK inverted for DSCK = 1.
Figure 4. Audio DSP and Auxiliary Port Data Input Formats
DS188F4
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