CS4226_04 Datasheet, PDF (19/37 Pages) Cirrus Logic – Surround Sound Codec

CS4226
low to write. The next 8 bits form the Memory
Address Pointer (MAP), which is set to the ad-
dress of the register that is to be updated. The
next 8 bits are the data which will be placed
into register designated by the MAP. During
writes, the CDOUT output stays in the high im-
pedance state. It may be externally pulled high
or low with a 47 kΩ resistor.
The CS4226 has a MAP auto increment capa-
bility, enabled by the INCR bit in the MAP reg-
ister. If INCR is a zero, then the MAP will stay
constant for successive reads or writes. If
INCR is set to a 1, then MAP will auto incre-
ment after each byte is read or written, allow-
ing block reads or writes of successive
registers.
To read a register, the MAP has to be set to
the correct address by executing a partial write
cycle which finishes (CS high) immediately af-
ter the MAP byte. The auto MAP increment bit
(INCR) may be set or not, as desired. To begin
a read, bring CS low, send out the chip ad-
dress and set the read/write bit (R/W) high.
The next falling edge of CCLK will clock out the
MSB of the addressed register (CDOUT will
leave the high impedance state). If the MAP
auto increment bit is set to 1, the data for suc-
cessive registers will appear consecutively.
2.6.2 I²C Mode
In I²C mode, SDA is a bidirectional data line.
Data is clocked into and out of the part by the
clock, SCL, with the clock to data relationship
as shown in Figure 8. There is no CS pin. Pins
AD0, AD1 form the partial chip address. The
upper 5 bits of the 7 bit address field must be
00100. To communicate with a CS4226, the
LSBs of the chip address field, which is the first
byte sent to the CS4226, should match the set-
tings of the AD1, AD0 pins. The eighth bit of
the address bit is the R/W bit (high for a read,
low for a write). The next byte is the Memory
Address Pointer (MAP) which selects the reg-
ister to be read or written. If the operation is a
write, the next byte is the data to be written to
the register pointed to by the MAP. If the oper-
ation is a read, the contents of the register
pointed to by the MAP will be output. Setting
the auto increment bit in MAP, allows succes-
sive reads or writes of consecutive registers.
Each byte is separated by an acknowledge bit.
I²C bus is a registered trademark of Philips
Semiconductors.
2.6.3 Control Port Bit Definitions
All registers can be written and read back, ex-
cept the DAC Status Report Byte, ADC Status
Report Byte, Receiver Status Byte, and the
Receiver Channel Status Bytes, which are
read only. See the bit definition tables for bit
assignment information.
CS
CCLK
CDIN
CHIP
ADDRESS
0010000
MAP
DATA
R/W
MSB
LSB
byte 1 byte n
CHIP
ADDRESS
0010000 _R/W
CDOUT
MSB
LSB MSB
LSB
High Impedance
MAP = Memory Address Pointer
Figure 7. Control Port Timing, SPI mode
DS188F4
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