EP7312 Datasheet, PDF (58/64 Pages) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE

EP7312
High-Performance, Low-Power System on Chip
Table 23. JTAG Boundary Scan Signal Ordering (Continued)
LQFP TFBGA PBGA
Pin No. Ball
Ball
Signal
Type Position
156
B20
B16
161
B16
B14
162
A16
D11
163
C15
A13
164
B15
F10
165
A15
B13
166
C14
E10
169
B14
B12
170
A14
D10
171
C13
A11
172
B13
G9
173
A13
B11
175
C12
A10
176
B12
F9
177
A12
B10
178
C11
E9
179
B11
A9
184
B10
D8
185
A10
B8
186
A9
E8
187
B9
A7
188
C9
F8
189
A8
B7
191
B8
A6
192
C8
G8
193
A7
B6
194
B7
D7
195
C7
A5
196
A6
E7
199
B6
F7
200
C6
A4
201
A5
D6
202
B5
B4
204
C5
E6
205
A4
A3
206
B4
D5
207
A3
B3
208
C4
A2
nURESET
WAKEUP
nPWRFL
A[6]
D[6]
A[5]
D[5]
A[4]
D[4]
A[3]
D[3]
A[2]
D[2]
A[1]
D[1]
A[0]
D[0]
CL2
CL1
FRM
M
DD[3]
DD[2]
DD[1]
DD[0]
nSDCS[1]
nSDCS[0]
SDQM[3]
SDQM[2]
SDCKE
SDCLK
nMWE/nSDWE
nMOE/nSDCAS
nCS[0]
nCS[1]
nCS[2]
nCS[3]
nCS[4]
I
284
I
285
I
286
O
287
I/O
289
O
292
I/O
294
O
297
I/O
299
O
302
I/O
304
O
307
I/O
309
O
312
I/O
314
O
317
I/O
319
O
322
O
324
O
326
O
328
O
330
O
333
O
336
O
339
O
342
O
344
I/O
346
I/O
349
I/O
352
I/O
355
O
358
O
360
O
362
O
364
O
366
O
368
O
370
58
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