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EP7312 Datasheet, PDF (33/64 Pages) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
DS508PP5
EP7312
High-Performance, Low-Power System on Chip
Table 20. 208-Pin LQFP Numeric Pin Listing (Continued)
Pin
No.
Signal
38
DSR
39
nTEST[1]
40
nTEST[0]
41
EINT[3]
42
nEINT[2]
43
nEINT[1]
44
nEXTFIQ
45
PE[2]/CLKSEL
46
PE[1]/BOOTSEL[1]
47
PE[0]/BOOTSEL[0]
48
VSSRTC
49
RTCOUT
50
RTCIN
51
VDDRTC
52
N/C
53
PD[7]/SDQM[1]
54
PD[6]/SDQM[0]
55
PD[5]
56
PD[4]
57
VDDIO
58
TMS
59
PD[3]
60
PD[2]
61
PD[1]
62
PD[0]/LEDFLSH
63
SSICLK
64
VSSIO
65
SSITXFR
66
SSITXDA
67
SSIRXDA
68
SSIRXFR
69
ADCIN
70
nADCCS
71
VSSCORE
72
VDDCORE
73
VSSIO
74
VDDIO
75
DRIVE[1]
76
DRIVE[0]
77
ADCCLK
78
ADCOUT
Strength†
With p/u*
With p/u*
1
1
1
1
1
1
1
with p/u*
1
1
1
1
1
1
1
1
2
2
1
1
Reset
State
Input‡
Input‡
Input‡
Low
Low
Low
Low
Low
Low
Low
Low
Input‡
Low
Low
Input‡
High
High /
Low
High /
Low
Low
Low
Type
I
I
I
I
I
I
I
I/O
I/O
I/O
RTC Gnd
O
I
RTC power
Description
UART 1 data set ready input
Test mode select input
Test mode select input
External interrupt
External interrupt input
External interrupt input
External fast interrupt input
GPIO port E / clock input
mode select
GPIO port E / boot mode
select
GPIO port E / Boot mode
select
Real time clock ground
Real time clock oscillator
output
Real time clock oscillator
input
Real time clock power, 2.5 V
I/O
I/O
I/O
I/O
Pad Pwr
I
I/O
I/O
I/O
I/O
I/O
Pad Gnd
I/O
O
I
I/O
I
O
Core ground
Core Pwr
Pad Gnd
Pad Pwr
I/O
I/O
O
O
GPIO port D / SDRAM byte
lane mask
GPIO port D / SDRAM byte
lane mask
GPIO port D
GPIO port D
Digital I/O power, 3.3 V
JTAG mode select
GPIO port D
GPIO port D
GPIO port D
GPIO port D / LED blinker
output
DAI/CODEC/SSI2 serial clock
I/O ground
DAI/CODEC/SSI2 serial clock
DAI/CODEC/SSI2 serial data
output
DAI/CODEC/SSI2 serial data
input
DAI/CODEC/SSI2 frame sync
SSI1 ADC serial input
SSI1 ADC chip select
Core ground
Core power, 2.5 V
I/O ground
Digital I/O power, 3.3 V
PWM drive output
PWM drive output
SSI1 ADC serial clock
SSI1 ADC serial data output
©Copyright Cirrus Logic, Inc. 2003
(All Rights Reserved)
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