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EP7312 Datasheet, PDF (50/64 Pages) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
EP7312
High-Performance, Low-Power System on Chip
Ball Location
C14
C15
C16
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14
E15
E16
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
F11
F12
50
Name
VSSIO
nPOR
nEXTPWR
WRITE/nSDRAS
EXPRDY
VSSIO
VDDIO
nCS[2]
nMWE/nSDWE
nSDCS[0]
CL[2]
VSSRTC
D[4]
nPWRFL
MOSCIN
VDDIO
VSSIO
D[7]
D[8]
RXD[2]
PB[7]
TDI
WORD
VSSIO
nCS[0]
SDQM[2]
FRM
A[0]
D[5]
VSSOSC
VSSIO
nMEDCHG/nBROM
VDDIO
D[9]
D[10]
PB[5]
PB[3]
VSSIO
TXD[2]
RUN/CLKEN
VSSIO
SDCKE
DD[3]
A[1]
D[6]
VSSRTC
BATOK
Table 22. 256-Ball PBGA Ball Listing (Continued)
Strength†
Reset
State
Schmitt
1
Low
1
1
High
1
High
1
High
1
Low
1
Low
1
Low
1
Low
1
with p/u*
1
Input‡
Low
1
High
2
Low
1
Low
2
Low
1
Low
1
Low
1
Low
1
Input‡
1
Input‡
1
High
1
Low
2
Low
1
Low
2
Low
1
Low
Type
Description
Pad ground
I
I
O
I
Pad ground
Pad power
O
O
O
O
Core ground
I/O
I
I
Pad power
Pad ground
I/O
I/O
I
I
I
O
Pad ground
O
O
O
O
I/O
Oscillator ground
Pad ground
I
Pad power
I/O
I/O
I
I/O ground
Power-on reset input
External power supply sense input
Transfer direction / SDRAM RAS signal output
Expansion port ready input
I/O ground
Digital I/O power, 3.3V
Chip select 2
ROM, expansion write enable/ SDRAM write enable control signal
SDRAM chip select 2
LCD pixel clock out
Real time clock ground
Data I/O
Power fail sense input
Main oscillator input
Digital I/O power, 3.3V
I/O ground
Data I/O
Data I/O
UART 2 receive data input
GPIO port B
JTAG data input
Word access select output
I/O ground
Chip select 0
SDRAM byte lane mask
LCD frame synchronization pulse
System byte address
Data I/O
PLL ground
I/O ground
Media change interrupt input / internal ROM boot enable
Digital I/O power, 3.3V
Data I/O
Data I/O
GPIO port B
I
Pad ground
O
O
Pad ground
O
O
O
I/O
RTC ground
I
GPIO port B
I/O ground
UART 2 transmit data output
Run output / clock enable output
I/O ground
SDRAM clock enable output
LCD serial display data
System byte address
Data I/O
Real time clock ground
Battery OK input
©Copyright Cirrus Logic, Inc. 2003
(All Rights Reserved)
DS508PP5