EP7312 Datasheet, PDF (56/64 Pages) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE

EP7312
High-Performance, Low-Power System on Chip
Table 23. JTAG Boundary Scan Signal Ordering (Continued)
LQFP TFBGA PBGA
Pin No. Ball
Ball
Signal
Type Position
56
V5
R3
59
Y5
T4
60
V6
N6
61
W6
R4
62
Y6
L7
68
W8
T6
69
Y8
K8
70
V9
R6
75
W10
M8
76
Y10
T8
77
V11
N8
78
W11
R8
79
Y11
N9
80
Y12
T9
82
Y11
M9
83
Y12
R9
84
Y13
L9
85
W13
T10
86
V13
K9
87
Y14
R10
88
W14
N10
91
Y15
R11
92
W15
M10
93
V15
T12
94
Y16
L10
95
W16
R12
96
V16
N11
97
Y17
T13
99
Y16
R13
100
Y18
M11
101
V17
T14
102
W18
N12
103
Y19
R14
104
Y20
T15
105
U18
N13
106
V209
R16
109
U19
P15
110
U20
M13
PD[4]
PD[3]
PD[2]
PD[1]
PD[0]/LEDFLSH
SSIRXFR
ADCIN
nADCCS
DRIVE1
DRIVE0
ADCCLK
ADCOUT
SMPCLK
FB1
FB0
COL7
COL6
COL5
COL4
COL3
COL2
COL1
COL0
BUZ
D[31]
D[30]
D[29]
D[28]
A[27]/DRA[0]
D[27]
A[26]/DRA[1]
D[26]
A[25]/DRA[2]
D[25]
HALFWORD
A[24]/DRA[3]
D[24]
A[23]/DRA[4]
I/O
98
I/O
101
I/O
104
I/O
107
O
110
I/O
122
I
125
O
126
I/O
128
I/O
131
O
134
O
136
O
138
I
140
I
141
O
142
O
144
O
146
O
148
O
150
O
152
O
154
O
156
O
158
I/O
160
I/O
163
I/O
166
I/O
169
Out
172
I/O
174
O
177
I/O
179
O
182
I/O
184
O
187
O
189
I/O
191
O
194
56
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