SMJ44C251B Datasheet, PDF (49/57 Pages) Texas Instruments – 262144 BY 4-BIT MULTIPORT VIDEO RAM

Austin Semiconductor, Inc.
VRAM
SMJ44C251B
MT42C4256
FIGURE 39: Serial-Read-Cycle Timing (SE\-Controlled Read)
NOTES:
NOTE Y: While reading data through the serial-data register, the state of TRG\ is a don’t care as long as TRG\ is held high when RAS\ goes low.
This is to avoid the initiation of a register-to-memory-to-register data-transfer operation.
NOTE Z: The serial data-out cycle is used to read data out of the data registers. Before data can be read via SDQ, the device must be put into the
read mode by performing a transfer-read cycle. Any transfer-write cycles occurring between the transfer-read cycle and the subsequent shifting
out of data take the device out of the read mode and put it in the write mode, not allowing the reading of data.
SMJ44C251B/MT42C4256
Rev. 0.1 12/03
49
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