SMJ44C251B Datasheet, PDF (17/57 Pages) Texas Instruments – 262144 BY 4-BIT MULTIPORT VIDEO RAM

Austin Semiconductor, Inc.
VRAM
SMJ44C251B
MT42C4256
ELECTRICAL CHARACTERISTICS OVER RECOMMENDED RANGES
OF SUPPLY VOLTAGES AND OPERATING FREE-AIR TEMPERATURE
(UNLESS OTHERWISE NOTED)
PARAMETER
High-level output voltage
Low-level output voltage¹
Input leakage current
Output leakage current²
SYM
V_OH
V_OL
I_I
I_O
CONDITIONS
I_OH = -5mA
I_OL = 4.2mA
V_CC = 5V, V_I = 0V to 5.8V,
All others open
V_CC = 5.5V, V_O = 0V to V_CC
MIN
MAX
UNIT
2.4
V
0.4
V
±10
µA
±10
µA
PARAMETER³
Operating current
Operating current
Standby current
Standby current
RAS\-only refresh current
RAS\-only refresh current
Page-mode current
Page-mode current
CAS\-before-RAS\ current
CAS\-before-RAS\ current
Data-transfer current
Data-transfer current
SYM
I_CC1
I_CC1A
I_CC2
I_CC2A
I_CC3
I_CC3A
I_CC4
I_CC4A
I_CC5
I_CC5A
I_CC6
I_CC6A
CONDITIONS
t_c(rd) and t_c(W) = MIN
t_c(SC) = MIN
All clocks = V_CC
t_c(SC) = MIN
t_c(rd) and t_c(W) = MIN
t_c(SC) = MIN
t_c(P) = MIN
t_c(SC) = MIN
t_c(rd) and t_c(W) = MIN
t_c(SC) = MIN
t_c(rd) and t_c(W) = MIN
t_c(SC) = MIN
SAM
PORT
Standby
Active
Standby
Active
Standby
Active
Standby
Active
Standby
Active
Standby
Active
-10
-12
MIN MAX MIN MAX UNITS
100
90 mA
110
100 mA
15
15 mA
35
35 mA
100
90 mA
110
100 mA
65
60 mA
70
65 mA
90
80 mA
110
100 mA
100
90 mA
110
100 mA
NOTES:
1. The SMJ44C251B may exhibit simultaneous switching noise as described in the Texas Instruments Advanced CMOS Logic Designer’s Handbook.
This phenomenon is exhibited on the DQ terminals when the SDQ terminals are switched and on the SDQ terminals when the DQ terminals are
switched. This may cause V_OL and V_OH to exceed the data-book limit for a short period of time, depending upon output loading and temperature. Care
should be taken to provide proper termination, decoupling, and layout of the device to minimize simultaneous switching effects.
2. SE\ is disabled for SDQ output leakage tests.
3. I_CC (standby) denotes that the SAM port is inactive (standby) and the DRAM port is active (except for I_CC2).
I_CCA (active) denotes that the SAM port is active and the DRAM port is active (except for I_CC2).
I_CC is measured with no load on DQ or SDQ.
4. For conditions shown as MIN/ MAX, use the appropriate value specified in the timing requirements.
SMJ44C251B/MT42C4256
Rev. 0.1 12/03
17
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.