PS-AT65609EHW Datasheet, PDF (22/30 Pages) ATMEL Corporation – MICROCIRCUIT, DIGITAL, MEMORY, 8K x 8-Bit, 5V Very Low Power CMOS SRAM, MONOLITHIC SILICON

Figure 3c - Write Cycle 3
CS1 or CE controlled
PS-AT65609EHW
Rev A
NOTE : The internal write time of the memory is defined by the overlap of CS1 Low and CE HIGH and WE LOW. Both signals
must be actived to initiate a write and either signal can terminate a write by going in actived. The data input setup and
hold timing should be referenced to the actived edge of the signal that terminates the write. Data out is high impedance
if OE = V_IH.
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