TMD2725 Datasheet, PDF (20/50 Pages) ams AG – The device features advanced proximity measurement

TMD2725 − RegisterDescription
Figure 24:
WTIME Register
WTIME Register (Address 0x83)
Addr: 0x83
Bit Bit Name
7:0
WTIME
Default
0x00
WTIME
Access
Bit Description
Value that specifies the wait time between ALS cycles in
2.81ms increments.
Value
Increments
Wait Time
0x00
1
2.8ms (33.8ms)
RW
0x01
…
2
5.6ms (67.6ms)
…
…
0x3F
…
0xFF
64
180ms (2.16s)
…
…
256
719ms (8.65s)
Figure 25:
AILTL Register
The wait timer is implemented using a down counter.
Wait time = (value +1) x 2.8ms. If WLONG is enabled then
Wait time = (value +1) x 2.8ms. x 12.
AILTL Register (Address 0x84)
Addr: 0x84
Bit Bit Name
7:0
AILTL
Default
0x00
AILTL
Access
Bit Description
RW
This register sets the low byte of the LOW ALS threshold.
The photopic channel is compared against low-going 16-bit
threshold value set by AILTL and AILTH.
Page 20
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ams Datasheet
[v1-11] 2016-Sep-20