AM186EM Datasheet, PDF (72/98 Pages) List of Unclassifed Manufacturers – MICROCONTROLLER BLOCK DIAGRAM

PRELIMINARY
SWITCHING CHARACTERISTICS over COMMERCIAL operating range
PSRAM Write Cycle (20 MHz and 25 MHz)
Parameter
No. Symbol
Description
General Timing Responses
5
t_CLAV
AD Address Valid Delay and
BHE
7
t_CLDV Data Valid Delay
8
t_CHDX Status Hold Time
9
t_CHLH ALE Active Delay
10
t_LHLL ALE Width
11 t_CHLL ALE Inactive Delay
23 t_LHAV ALE High to Address Valid
20 t_CVCTV Control Active Delay 1^(b)
80 t_CLCLX LCS Inactive Delay
81 t_CLCSL LCS Active Delay
84 t_LRLL LCS Precharge Pulse Width
Write Cycle Timing Responses
30 t_CLDOX Data Hold Time
31 t_CVCTX Control Inactive Delay^(b)
32 t_WLWH WR Pulse Width
33 t_WHLH WR Inactive to ALE High^(a)
34 t_WHDX Data Hold after WR^(a)
65 t_AVWL A Address Valid to WR Low
68
t_CHAV
CLKOUTA High to A
Address Valid
87
t_AVBL
A Address Valid to WHB,
WLB Low
Preliminary
20 MHz
25 MHz
Min
Max
Min
Max
0
0
0
t_CLCL – 10 = 40
20
0
0
0
t_CLCL + t_CLCH
–3
25
0
20
25
0
20
0
25
20
t_CLCL – 10 = 30
25
20
15
25
0
20
25
0
20
25
0
20
t_CLCL + t_CLCH –
3
0
0
0
25
0
20
2t_CLCL– 10
= 90
2t_CLCL – 10
= 70
t_CLCH – 2
t_CLCL – 10 = 40
t_CLCL +t_CHCL
–3
t_CLCH – 2
t_CLCL – 10 = 30
t_CLCL +t_CHCL
–3
0
25
0
20
t_CHCL – 3
25
t_CHCL – 3
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes:
All timing parameters are measured at 1.5 V with 50 pF loading on CLKOUTA unless otherwise noted. All output test conditions
are with C_L = 50 pF. For switching tests, V_IL = 0.45 V and V_IH = 2.4 V, except at X1 where V_IH = V_CC – 0.5 V.
a Equal loading on referenced pins.
b This parameter applies to the DEN, WR, WHB, and WLB signals.
72
Am186/188EM and Am186/188EMLV Microcontrollers