AM186EM Datasheet, PDF (62/98 Pages) List of Unclassifed Manufacturers – MICROCONTROLLER BLOCK DIAGRAM

PRELIMINARY
Numerical Key to Switching Parameter Symbols
Parameter
Number Symbol
Description
Parameter
Number Symbol
Description
1
t_DVCL Data in Setup
2
t_CLDX Data in Hold
3
t_CHSV Status Active Delay
4
t_CLSH Status Inactive Delay
5
t_CLAV AD Address Valid Delay
6
t_CLAX Address Hold
7
t_CLDV Data Valid Delay
8
t_CHDX Status Hold Time
9
t_CHLH ALE Active Delay
10
t_LHLL ALE Width
11
t_CHLL ALE Inactive Delay
12
t_AVLL AD Address Valid to ALE Low
13
t_LLAX
AD Address Hold from ALE
Inactive
43
t_CLCH CLKOUTA Low Time
44
t_CHCL CLKOUTA High Time
45
t_CH1CH2 CLKOUTA Rise Time
46
t_CL2CL1 CLKOUTA Fall Time
47
t_SRYCL SRDY Transition Setup Time
48
t_CLSRY SRDY Transition Hold Time
49
t_ARYCH ARDY Resolution Transition Setup Time
50
t_CLARX ARDY Active Hold Time
51
t_ARYCHL ARDY Inactive Holding Time
52
t_ARYLCL ARDY Setup Time
53
t_INVCH Peripheral Setup Time
54
t_INVCL DRQ Setup Time
55
t_CLTMV Timer Output Delay
14
t_AVCH AD Address Valid to Clock High
57
t_RESIN RES Setup Time
15
t_CLAZ AD Address Float Delay
58
t_HVCL HOLD Setup
16
t_CLCSV MCS/PCS Active Delay
59
t_RHDX RD High to Data Hold on AD Bus
17
t_CXCSX
MCS/PCS Hold from Command
Inactive
61
t_LOCK Maximum PLL Lock Time
18
t_CHCSX MCS/PCS Inactive Delay
62
19
t_DXDL DEN Inactive to DT/R Low
63
20
t_CVCTV Control Active Delay 1
64
21
t_CVDEX DEN Inactive Delay
65
22
t_CHCTV Control Active Delay 2
66
23
t_LHAV ALE High to Address Valid
67
24
t_AZRL AD Address Float to RD Active
68
25
t_CLRL RD Active Delay
69
26
t_RLRH RD Pulse Width
70
27
t_CLRH RD Inactive Delay
71
28
t_RHLH RD Inactive to ALE High
72
29
t_RHAV RD Inactive to AD address Active
75
30
t_CLDOX Data Hold Time
77
31
t_CVCTX Control Inactive Delay
78
32
t_WLWH WR Pulse Width
79
33
t_WHLH WR Inactive to ALE High
80
34
t_WHDX Data Hold after WR
81
35
t_WHDEX WR Inactive to DEN Inactive
82
36
t_CKIN X1 Period
83
37
t_CLCK X1 Low Time
84
38
t_CHCK X1 High Time
85
39
t_CKHL X1 Fall Time
86
40
t_CKLH X1 Rise Time
87
42
t_CLCL CLKOUTA Period
t_CLHAV
t_CHCZ
t_CHCV
t_AVWL
t_AVRL
t_CHCSV
t_CHAV
t_CICOA
t_CICOB
t_CLEV
t_CLSL
t_DVSH
t_SHDX
t_SLDV
t_CHRFD
t_CLCLX
t_CLCSL
t_CLRF
t_COAOB
t_LRLL
t_RFCY
t_LCRF
t_AVBL
HLDA Valid Delay
Command Lines Float Delay
Command Lines Valid Delay (after Float)
A Address Valid to WR Low
A Address Valid to RD Low
CLKOUTA High to LCS/UCS Valid
CLKOUTA High to Address Valid
X1 to CLKOUTA Skew
X1 to CLKOUTB Skew
CLKOUTA Low to SDEN Valid
CLKOUTA Low to SCLK Low
Data Valid to SCLK High
SCLK High to SPI Data Hold
SCLK Low to SPI Data Valid
CLKOUTA High to RFSH Valid
LCS Inactive Delay
LCS Active Delay
CLKOUTA High to RFSH Invalid
CLKOUTA to CLKOUTB Skew
LCS Precharge Pulse Width
RFSH Cycle Time
LCS Inactive to RFSH Active Delay
A Address Valid to WHB, WLB Low
Note:
The following parameters are not defined or used at this time: 41, 56, 60, 73, 74, and 76.
62
Am186/188EM and Am186/188EMLV Microcontrollers