AM186EM Datasheet, PDF (61/98 Pages) List of Unclassifed Manufacturers – MICROCONTROLLER BLOCK DIAGRAM

PRELIMINARY
Alphabetical Key to Switching Parameter Symbols
Parameter
Symbol No.
Description
Parameter
Symbol No.
Description
t_ARYCH
49 ARDY Resolution Transition Setup Time
t_CLDX
2 Data in Hold
t_ARYCHL 51 ARDY Inactive Holding Time
t_CLEV
71 CLKOUTA Low to SDEN Valid
t_ARYLCL 52 ARDY Setup Time
t_CLHAV
62 HLDA Valid Delay
t_AVBL
87 A Address Valid to WHB, WLB Low
t_CLRF
82 CLKOUTA High to RFSH Invalid
t_AVCH
14 AD Address Valid to Clock High
t_CLRH
27 RD Inactive Delay
t_AVLL
12 AD Address Valid to ALE Low
t_CLRL
25 RD Active Delay
t_AVRL
66 A Address Valid to RD Low
t_CLSH
4 Status Inactive Delay
t_AVWL
65 A Address Valid to WR Low
t_CLSL
72 CLKOUTA Low to SCLK Low
t_AZRL
24 AD Address Float to RD Active
t_CLSRY
48 SRDY Transition Hold Time
t_CH1CH2 45 CLKOUTA Rise Time
t_CLTMV
55 Timer Output Delay
t_CHAV
68 CLKOUTA High to A Address Valid
t_COAOB 83 CLKOUTA to CLKOUTB Skew
t_CHCK
38 X1 High Time
t_CVCTV
20 Control Active Delay 1
t_CHCL
44 CLKOUTA High Time
t_CVCTX
31 Control Inactive Delay
t_CHCSV 67 CLKOUTA High to LCS/UCS Valid
t_CVDEX
21 DEN Inactive Delay
t_CHCSX 18 MCS/PCS Inactive Delay
t_CXCSX
17 MCS/PCS Hold from Command Inactive
t_CHCTV
22 Control Active Delay 2
t_DVCL
1 Data in Setup
t_CHCV
64 Command Lines Valid Delay (after Float) t_DVSH
75 Data Valid to SCLK High
t_CHCZ
63 Command Lines Float Delay
t_DXDL
19 DEN Inactive to DT/R Low
t_CHDX
8 Status Hold Time
t_HVCL
58 HOLD Setup
t_CHLH
9 ALE Active Delay
t_INVCH
53 Peripheral Setup Time
t_CHLL
11 ALE Inactive Delay
t_INVCL
54 DRQ Setup Time
t_CHRFD 79 CLKOUTA High to RFSH valid
t_LCRF
86 LCS Inactive to RFSH Active Delay
t_CHSV
3 Status Active Delay
t_LHAV
23 ALE High to Address Valid
t_CICOA
69 X1 to CLKOUTA Skew
t_LHLL
10 ALE Width
t_CICOB
70 X1 to CLKOUTB Skew
t_LLAX
13 AD Address Hold from ALE Inactive
t_CKHL
39 X1 Fall Time
t_LOCK
61 Maximum PLL Lock Time
t_CKIN
36 X1 Period
t_LRLL
84 LCS Precharge Pulse Width
t_CKLH
40 X1 Rise Time
t_RESIN
57 RES Setup Time
t_CL2CL1 46 CLKOUTA Fall Time
t_RFCY
85 RFSH Cycle Time
t_CLARX
50 ARDY Active Hold Time
t_RHAV
29 RD Inactive to AD Address Active
t_CLAV
5 AD Address Valid Delay
t_RHDX
59 RD High to Data Hold on AD Bus
t_CLAX
6 Address Hold
t_RHLH
28 RD Inactive to ALE High
t_CLAZ
15 AD Address Float Delay
t_RLRH
26 RD Pulse Width
t_CLCH
43 CLKOUTA Low Time
t_SHDX
77 SCLK High to SPI Data Hold
t_CLCK
37 X1 Low Time
t_SLDV
78 SCLK Low to SPI Data Valid
t_CLCL
42 CLKOUTA Period
t_SRYCL
47 SRDY Transition Setup Time
t_CLCLX
80 LCS Inactive Delay
t_WHDEX 35 WR Inactive to DEN Inactive
t_CLCSL
81 LCS Active Delay
t_WHDX
34 Data Hold after WR
t_CLCSV
16 MCS/PCS Active Delay
t_WHLH
33 WR Inactive to ALE High
t_CLDOX
30 Data Hold Time
t_WLWH
32 WR Pulse Width
t_CLDV
7 Data Valid Delay
Note:
The following parameters are not defined or used as this time: 41, 56, 60, 73, 74, 76.
Am186/188EM and Am186/188EMLV Microcontrollers
61