EP20K30ETC144-2N Datasheet, PDF (89/117 Pages) Altera Corporation – Programmable Logic Device Family

APEX 20K Programmable Logic Device Family Data Sheet
Table 62. EP20K100E f_MAX ESB Timing Microparameters
Symbol
-1
-2
t_ESBARC
t_ESBSRC
t_ESBAWC
t_ESBSWC
t_ESBWASU
t_ESBWAH
t_ESBWDSU
t_ESBWDH
t_ESBRASU
t_ESBRAH
t_ESBWESU
t_ESBWEH
t_ESBDATASU
t_ESBDATAH
t_ESBWADDRSU
t_ESBRADDRSU
t_ESBDATACO1
t_ESBDATACO2
t_ESBDD
t_PD
t_PTERMSU
t_PTERMCO
Min
0.56
0.48
0.71
.048
1.57
0.00
1.54
0.00
-0.16
0.13
0.12
0.17
1.11
Max
Min
1.61
2.57
0.52
3.17
6.41
0.54
0.80
0.54
1.75
0.00
1.72
0.00
-0.20
0.13
0.08
0.15
1.20
2.54
3.06
1.73
1.26
1.19
Max
1.84
2.97
4.09
3.78
1.39
2.99
3.56
2.02
1.40
Table 63. EP20K100E f_MAX Routing Delays
Symbol
-1
-2
t_F1-4
t_F5-20
t_F20+
Min
Max
Min
Max
0.24
0.27
1.04
1.26
1.12
1.36
-3
Unit
Min
Max
0.63
0.55
0.81
0.55
1.87
0.20
1.80
0.00
-0.20
0.13
0.13
0.19
1.38
1.97
ns
3.20
ns
4.39
ns
4.09
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1.52
ns
3.22
ns
3.85
ns
2.20
ns
ns
1.08
ns
-3
Unit
Min
Max
0.29
ns
1.52
ns
1.86
ns
Altera Corporation
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