EP20K30ETC144-2N Datasheet, PDF (82/117 Pages) Altera Corporation – Programmable Logic Device Family

APEX 20K Programmable Logic Device Family Data Sheet
Notes to Tables 43 through 48:
(1) This parameter is measured without using ClockLock or ClockBoost circuits.
(2) This parameter is measured using ClockLock or ClockBoost circuits.
Tables 49 through 54 describe f_MAX LE Timing Microparameters, f_MAX
ESB Timing Microparameters, f_MAX Routing Delays, Minimum Pulse
Width Timing Parameters, External Timing Parameters, and External
Bidirectional Timing Parameters for EP20K30E APEX 20KE devices.
Table 49. EP20K30E f_MAX LE Timing Microparameters
Symbol
-1
-2
Min
Max
Min
Max
t_SU
0.01
0.02
t_H
0.11
0.16
t_CO
0.32
0.45
t_LUT
0.85
1.20
-3
Unit
Min
Max
0.02
ns
0.23
ns
0.67
ns
1.77
ns
82
Altera Corporation