EP2C5F256C7N Datasheet, PDF(141/168 Page) Altera Corporation – Section I. Cyclone II Device Family Data Sheet

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EP2C5F256C7N Datasheet, PDF (141/168 Pages) Altera Corporation – Section I. Cyclone II Device Family Data Sheet

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DC Characteristics and Timing Specifications

Table 5â45. Maximum Output Clock Toggle Rate on Cyclone II Devices (Part 4 of 4)

Maximum Output Clock Toggle Rate on Cyclone II Devices (MHz)

I/O Standard

Drive

Strength

Column I/O Pins (1) Row I/O Pins (1)

Dedicated Clock

Outputs

â6 â7 â8 â6 â7 â8 â6 â7 â8

Speed Speed Speed Speed Speed Speed Speed Speed Speed

Grade Grade Grade Grade Grade Grade Grade Grade Grade

1.5V_

DIFFERENTIAL_HSTL

_CLASS_I

8 mA

10 mA

12 mA

210 170 140 210 170 140 210 170 140

220 180 150 â

230 190 160 â

1.5V_

16 mA

DIFFERENTIAL_HSTL

_CLASS_II

210 170 140 â

LVDS

400 340 280 400 340 280 400 340 280

RSDS

400 340 280 400 340 280 400 340 280

MINI_LVDS

400 340 280 400 340 280 400 340 280

SIMPLE_RSDS

380 320 260 380 320 260 380 320 260

1.2V_HSTL

1.2V_

DIFFERENTIAL_HSTL

PCI

â 350 315 280 350 315 280

PCI-X

â 350 315 280 350 315 280

LVTTL

OCT_25_ 360 300 250 360 300 250 360 300 250

OHMS

LVCMOS

OCT_25_ 360 300 250 360 300 250 360 300 250

OHMS

2.5V

OCT_50_ 240 200 160 240 200 160 240 200 160

OHMS

1.8V

OCT_50_ 290 240 200 290 240 200 290 240 200

OHMS

SSTL_2_CLASS_I

OCT_50_ 240 200 160 240 200 160 â

OHMS

SSTL_18_CLASS_I OCT_50_ 290 240 200 290 240 200 â

OHMS

Note to Table 5â45:

(1) This is based on single data rate I/Os.

Altera Corporation

February 2008

5â51

Cyclone II Device Handbook, Volume 1

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