HC311 Datasheet, PDF (13/26 Pages) Altera Corporation – HardCopy III Device

Chapter 1: DC and Switching Characteristics of HardCopy III Devices
1–11
Electrical Characteristics
Table 1–17. Differential I/O Standard Specifications – Preliminary (Part 2 of 2)
VCCIO (V)
VID (mV)
V (V) ICM (DC)
VOD (V) (1)
VOCM (V) (1)
I/O Standard Min Typ Max Min Condition Max Min Condition Max Min Typ Max Min Typ Max
2.5V LVDS 2.375 2.5 2.625 100 V_CM = 1.25V
—
0.05 Dmax ≤ 700
(2)
Mbps
1.8
(2)
0.247
—
0.6
1.0 1.25 1.5
(Column
I/O)
2.375 2.5 2.625 100 V_CM = 1.25V
—
1.05 Dmax > 700 1.55
(2)
Mbps
(2)
—
—
—
—
—
1.5
RSDS
(Row I/O) ^{2.375 2.5 2.625 100 VCM = 1.25V}
—
0.3
—
1.4 0.1 0.2 0.6 0.5 1.2 1.4
RSDS
(Column
2.375 2.5 2.625 100 V_CM = 1.25V — 0.3
—
1.4 0.1 0.2 0.6 0.5 1.2 1.5
I/O)
Mini-LVDS
(Row I/O) ^{2.375 2.5 2.625 200}
—
600 0.4
—
1.325 0.25 — 0.6 0.5 1.2 1.4
Mini-LVDS
(Column 2.375 2.5 2.625 200
—
600 0.4
—
1.325 0.25 — 0.6 0.5 1.2 1.5
I/O)
2.375
(4)
2.5
(4)
2.625
(4)
300
—
LVPECL (3)
————
—
—
0.6
Dmax ≤ 700
Mbps
1.8
(5)
—
—
—
—
—
—
—
0.6 ^{Dmax ≤ 700 1.6}
—
—
—
—
—
—
Mbps
(5)
Notes to Table 1–17:
(1) RL range: 90 ≤ RL ≤ 110 Ω .
(2) For data rate: Dmax > 700 Mbps, the minimum input voltage is 1.0 V, the maximum input voltage is 1.6 V. For Dmax ≤ 700 Mbps, the minimum input
voltage is 0 V, the maximum input voltage is 1.85 V.
(3) Column and Row I/O banks support LVPECL I/O standards for input operation only on dedicated clock input pins. Differential clock inputs in
column I/O use V_{CC_CLKIN} which should be powered by 2.5 V. Differential clock inputs in row I/Os are powered by V_CCPD.
(4) Power supply for column I/O LVPECL differential clock input buffer is VCC_CLKIN.
(5) For data rate Dmax > 700 Mbps, the minimum input voltage is 0.85 V, and the maximum input voltage is 1.75 V. For data rate Dmax ≤ 700 Mbps, the
minimum input voltage is 0.45 V, and the maximum input voltage is 1.95 V.
Power Consumption
Altera offers two ways to estimate power for a design: the Excel-based Early Power
Estimator and the Quartus^® II PowerPlay Power Analyzer feature.
Use the interactive Excel-based Early Power Estimator prior to designing in order to
get a magnitude estimate of the device power. The Quartus II PowerPlay Power
Analyzer provides better quality estimates based on the specifics of the design after
the place-and-route is complete. The PowerPlay Power Analyzer can apply a
combination of user-entered, simulation-derived, and estimated signal activities
which, combined with detailed circuit models, can yield very accurate power
estimates.
See Table 1–4 on page 1–5 for supply current estimates for V_CCPGM and V . _{CC_CLKIN} Use
the EPE and PowerPlay Power Analyzer for current estimates of the remaining power
supplies.
f For more information about power estimation tools, refer to the Power Play Early
Power Estimator User Guide and the PowerPlay Power Analysis chapter in volume 3 of
the Quartus II Device Handbook.
© December 2008 Altera Corporation
HardCopy III Device Handbook, Volume 3