AK4613 Datasheet, PDF (63/69 Pages) Asahi Kasei Microsystems – 4/12-Channel Audio CODEC

[AK4613]
1. Grounding and Power Supply Decoupling
The AK4613 requires careful attention to power supply and grounding arrangements. AVDD1, AVDD2, TVDD1 and
TVDD2 are usually supplied from analog supply in system. Alternatively if AVDD1, AVDD2, TVDD1 and TVDD2 are
supplied separately, the power up sequence is not critical. VSS1, VSS2, VSS3 and VSS4 of the AK4613 must be
connected to analog ground plane. System analog ground and digital ground should be connected together near to
where the supplies are brought onto the printed circuit board. Decoupling capacitors should be as near to the AK4613 as
possible, with the small value ceramic capacitor being the nearest.
2. Voltage Reference Inputs
The voltage of VREFH1, VREFH2 set the analog input/output range. The VREFH1 pin is normally connected to AVDD1
with a 0.1µF ceramic capacitor. The VREFH2 pin is normally connected to AVDD2 with a 0.1µF ceramic capacitor.
VCOM is a signal ground of this chip and output the voltage AVDD1x1/2. An electrolytic capacitor 2.2µF parallel with a
0.1µF ceramic capacitor attached to the VCOM pin eliminates the effects of high frequency noise. Ceramic capacitors
should be as near to the pin as possible. No load current may be drawn from the VCOM pin. All signals, especially clocks,
should be kept away from the VREFH1, VREFH2 and VCOM pins in order to avoid unwanted coupling into the AK4613.
3. Analog Inputs
The ADC inputs correspond to single-ended and differential are able to select by DIE2-1 bits. When the inputs are
single-ended, internally biased to the common voltage (AVDD1x1/2) with 9kΩ(typ) resistance. The input signal range
scales with the supply voltage and nominally 0.65xVREFH1 Vpp (typ) @fs=48kHz. When the inputs are differential,
internally biased to the common voltage (AVDD2x1/2) with 13kΩ(typ) resistance. The input signal range between
LIN(RIN)+ and LIN(RIN)− scales with the supply voltage and nominally ±0.65xVREFH1 Vpp (typ) @fs=48kHz The
ADC output data format is 2’s complement. The internal HPF removes the DC offset.
The AK4613 samples the analog inputs at 128fs (@ fs=48kHz). The digital filter rejects noise above the stop band except
for multiples of the sampling frequency of analog inputs. The AK4613 includes an anti-aliasing filter (RC filter) to
attenuate a noise around the sampling frequency of analog inputs.
4. Analog Outputs
The DAC outputs correspond to single-ended and differential are able to select by DOE6-1 bits. When the outputs are
single-ended, the output signal range is centered around the VCOM voltage and nominally 0.63 x VREFH2 Vpp. When
the outputs are differential, the output signal ranges are ±0.63 x VREFH2 Vpp (typ) centered around the VCOM voltage.
The differential outputs are summed externally, V_AOUT = [L®OUT+]-[L®OUT-] between L®OUT+ and L®OUT-. If the
summing gain is 1, the output range is 4.16Vpp (typ@AVDD2=3.3V). The bias voltage of the external summing circuit is
supplied externally. The DAC input data format is 2’s complement. The output voltage is a positive full scale for
7FFFFFH(@24bit) and a negative full scale for 800000H(@24bit). The ideal output is VCOM voltage for
000000H(@24bit). The internal analog filters remove most of the noise generated by the delta-sigma modulator of DAC
beyond the audio passband, when the single-end input mode. The differential output mode does not have the internal
analog filters, therefore this noise should be remove by the external analog filters.
DC offsets on analog outputs are eliminated by AC coupling since DAC outputs have DC offsets of a few mV.
MS1052-E-02
- 63 -
2010/03