AK4613 Datasheet, PDF (51/69 Pages) Asahi Kasei Microsystems – 4/12-Channel Audio CODEC

[AK4613]
■ Serial Control Interface
The AK4613’s functions are controlled through registers. The registers may be written by two types of control modes.
The chip address is determined by the state of the CAD0 and CAD1 inputs. The PDN pin = “L” initializes the registers to
their default values. Writing “0” to the RSTN bit can initialize the internal timing circuit, but the register data will not be
initialized.
(1) 4-wire Serial Control Mode (I2C pin = “L”)
The internal registers may be written through the 4-wire µP interface pins (CSN, CCLK, CDTI and CDTO). The data on
this interface consists of a 2-bit Chip address, Read/Write, Register address (MSB first, 5bits) and Control data (MSB
first, 8bits). The chip address high bit is fixed to “1” and the lower bit is set by the CAD0 pin. Address and data are
clocked in on the rising edge of CCLK and data is clocked out on the falling edge. After a low-to-high transition of CSN,
data is latched for write operations and CDTO bit outputs Hi-Z. The clock speed of CCLK is 5MHz (max). The value of
internal registers is initialized when the PDN pin = “L”.
CSN
CCLK _{“H” or “L”}
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
“H” or “L”
CDTI
WRITE
CDTO
“H” or “L”
C1 C0 R/W A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 ^{“H” or “L”}
Hi-Z
CDTI
READ
CDTO
“H” or “L”
C1 C0 R/W A4 A3 A2 A1 A0
“H” or “L”
Hi-Z
Hi-Z
D7 D6 D5 D4 D3 D2 D1 D0
C1 – C0: Chip Address (C1=CAD1, C0=CA0)
R/W: READ / WRITE (“1”: WRITE, “0”: READ)
A4 – A0: Register Address
D7 – D0: Control Data
Figure 49. Serial Control I/F Timing
MS1052-E-02
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2010/03