AK4613 Datasheet, PDF (57/69 Pages) Asahi Kasei Microsystems – 4/12-Channel Audio CODEC

[AK4613]
Addr
03H
Register Name
Control 1
R/W
Default
D7
TDM1
R/W
0
D6
TDM0
R/W
0
D5
DIF2
R/W
1
D4
DIF1
R/W
0
D3
DIF0
R/W
0
D2
ATS1
R/W
0
D1
ATS0
R/W
0
D0
SMUTE
R/W
0
SMUTE: Soft Mute Enable
0: Normal operation
1: All DAC outputs soft-muted
ATS1-0: Digital attenuator transition time setting (Table 18)
Initial: “00”, mode 0
DIF2-0: Audio Data Interface Modes (Table 11, Table 12, Table 13, Table 14)
Initial: “100”, mode 4
TDM1-0: TDM Format Select (Table 11, Table 12, Table 13, Table 14)
Mode
0
1
2
3
TDM1
0
0
1
0
TDM0
0
1
1
1
SDTI
1-6
1
1-2
1-3
Sampling Speed
Stereo mode (Normal, Double, Quad Speed Mode)
TDM512 mode (Normal Speed Mode)
TDM256 mode (Double Speed Mode)
TDM128 mode (Quad Speed Mode)
Addr
04H
Register Name
Control 2
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
MCKO CKS1 CKS0 DFS1 DFS0 ACKS DIV
RD R/W R/W R/W R/W R/W R/W R/W
0
0
1
0
0
0
0
0
DIV: Output of Master clock frequency
0: x 1
1: x 1/2
ACKS: Master Clock Frequency Auto Setting Mode Enable
0: Disable, Manual Setting Mode
1: Enable, Auto Setting Mode
Master clock frequency is detected automatically at ACKS bit “1”. In this case, the setting of DFS are
ignored. When this bit is “0”, DFS0, 1 set the sampling speed mode.
DFS1-0: Sampling speed mode (Table 1)
The setting of DFS is ignored at ACKS bit =“1”.
CKS1-0: Master Clock Input Frequency Select (Table 2)
MCKO: Master clock output enable
0: Output “L”
1: Output “MCKO”
MS1052-E-02
- 57 -
2010/03