AK4613 Datasheet, PDF (17/69 Pages) Asahi Kasei Microsystems – 4/12-Channel Audio CODEC

[AK4613]
Parameter
Symbol min
typ
max
Units
Audio Interface Timing (Slave mode)
Stereo mode (TDM0 bit = “0”, TDM1 bit = “0”)
(TVDD1= 1.6V∼3.6V)
BICK Period
tBCK
324
ns
BICK Pulse Width Low
tBCKL 130
ns
Pulse Width High
tBCKH 130
ns
LRCK Edge to BICK “↑”
(Note 21)
BICK “↑” to LRCK Edge
(Note 21)
LRCK to SDTO(MSB) (Except I²S mode)
BICK “↓” to SDTO
tLRB
20
tBLR
20
tLRS
tBSD
ns
ns
80
ns
80
ns
SDTI Hold Time
tSDH
50
ns
SDTI Setup Time
tSDS
50
ns
(TVDD1= 3.0V∼3.6V)
BICK Period
tBCK
81
ns
BICK Pulse Width Low
tBCKL
33
ns
Pulse Width High
tBCKH 33
ns
LRCK Edge to BICK “↑”
(Note 21)
tLRB
23
ns
BICK “↑” to LRCK Edge
(Note 21)
LRCK to SDTO(MSB) (Except I²S mode)
tBLR
23
tLRS
ns
23
ns
BICK “↓” to SDTO
tBSD
23
ns
SDTI Hold Time
tSDH
10
ns
SDTI Setup Time
tSDS
10
ns
TDM512 mode (TDM0 bit = “0”, TDM1 bit = “1”)
(TVDD1= 3.0V∼3.6V)
(Note 17)
ns
BICK Period
tBCK
40
ns
BICK Pulse Width Low
tBCKL
16
ns
Pulse Width High
tBCKH 16
ns
LRCK Edge to BICK “↑”
(Note 21)
tLRB
10
ns
BICK “↑” to LRCK Edge
(Note 21)
tBLR
10
ns
SDTO Setup time BICK “↑”
tBSS
6
ns
SDTO Hold time BICK “↑”
tBSH
5
ns
SDTI Hold Time
tSDH
10
ns
SDTI Setup Time
tSDS
10
ns
TDM256 mode (TDM0 bit = “1”, TDM1 bit = “0”)
(TVDD1= 3.0V∼3.6V)
(Note 18)
BICK Period
tBCK
40
ns
BICK Pulse Width Low
tBCKL
16
ns
Pulse Width High
tBCKH 16
ns
LRCK Edge to BICK “↑”
(Note 21)
tLRB
10
ns
BICK “↑” to LRCK Edge
(Note 21)
tBLR
10
ns
SDTO Setup time BICK “↑”
tBSS
6
ns
SDTO Hold time BICK “↑”
tBSH
5
ns
SDTI Hold Time
tSDH
10
ns
SDTI Setup Time
tSDS
10
ns
TDM128 mode (TDM0 bit = “1”, TDM1 bit = “1”)
(TVDD1= 3.0V∼3.6V)
(Note 19)
BICK Period
tBCK
40
ns
BICK Pulse Width Low
tBCKL
16
ns
Pulse Width High
tBCKH 16
ns
LRCK Edge to BICK “↑”
(Note 21)
tLRB
10
ns
BICK “↑” to LRCK Edge
(Note 21)
tBLR
10
ns
SDTO Setup time BICK “↑”
tBSS
6
ns
SDTO Hold time BICK “↑”
tBSH
5
ns
SDTI Hold Time
tSDH
10
ns
SDTI Setup Time
tSDS
10
ns
MS1052-E-02
- 17 -
2010/03