AK4613 Datasheet, PDF (49/69 Pages) Asahi Kasei Microsystems – 4/12-Channel Audio CODEC

[AK4613]
■ ADC partial Power-Down Function
All of the ADCs can be powered-down individually by PMAD2-1 bits. The analog section and the digital section of the
ADC are in power-down mode when the PMAD2-1 bits = “0”. The analog section of ADCs are initialized after exiting the
power-down state. Digital outputs corresponding to analog input have group delay (GD). ADC output is “0” data at the
power-down state. Click noise occurs when the internal RSTN bit becomes “1”. Mute the digital output externally if the
click noise influences system applications. Figure 47 shows the power-down and power-up sequences by PMAD2-1 bits.
PMAD2-1 bit
Power Down Channel
4~5/fs (1)
2~3/fs (2)
4~5/fs (1)
2~3/fs (2)
ADCDigital
Internal State
ADC Analog
Internal State
ADC In
(Analog)
Normal Operation Power-down
Normal Operation Power-down
GD ⁽⁴⁾
Normal Operation
518/fs (3)
Power-down
Init Cycle Normal Operation Power-down
Normal Operation
518/fs (3)
Init Cycle
Normal Operation
(4)
GD
ADC Out
(Digital)
(5)
“0”data
(6)
(6)
Normal Operation Channel
ADC In
(Analog)
ADC Out
(Digital)
GD ⁽⁴⁾
(5)
“0”data
GD ⁽⁴⁾
Clock In
MCLK,LRCK,SCLK
Notes.
(1) There is a delay, 4~5/fs from PMAD2-1 bits become “0” to the applicable ADC power-down.
(2) There is a delay, 2~3/fs from PMAD2-1 bits “1” to the start of initial cycle.
(3) The analog section of the ADC is initialized after exiting reset state.
(4) Analog outputs corresponding to the digital inputs have group delay (GD).
(5) ADC output is “0” data at power-down state.
(6) Click noise occurs when the internal RSTN bit becomes “1”. Mute the digital output externally if the click noise
influences system application.
Figure 47. ADC partial power-down example
MS1052-E-02
- 49 -
2010/03