AK4495EQ Datasheet, PDF (55/63 Pages) Asahi Kasei Microsystems – Quality-oriented Premium 32-Bit 2ch DAC

[AK4495S/95]
10. Recommended External Circuits
Figure 36 shows the system connection diagram. Figure 38, Figure 39 and Figure 40 show the analog output
circuit examples. The evaluation board (AKD4495/AKD4495S) demonstrates the optimum layout, power
supply arrangements and measurement results.
DSP
Micro-
Controller
Digital 3.3V Analog 3.3V
+
10u
0.1u
10u
10u 10u
+
+
+
0.1u
0.1u 0.1u
Analog 5.0V
1 PDN
2 BICK
3 SDATA
4 LRCK
5 WCK
6 SMUTE/CSN
7 SD/CCLK/SCL
8 ^{SLOW/CDTI/SDA}
9 ^DIF0/DZFL
10 DIF1/DZFR
11 DIF2/CAD0
AOUTLN 33
VDDL 32
0.1u 10u
VDDL 31
+
VSSL 30
VSSL 29
NC 28
VSSR 27
N
0.1u 10u
VSSR 26
VDDR 25
+
VDDR 24
AOUTRN 23
0.1u 0.1u
+ _10u + _10u
Lch
Lch
LPF Mute
Lch Out
Rch Rch
LPF Mute
Rch Out
Digital
Ground
Analog
Ground
+
Electrolytic Capacitor
Ceramic Capacitor
Notes:
- Chip Address = “00”. BICK = 64fs, LRCK = fs
- Power lines of AVDD and DVDD should be distributed separately from the point with low impedance of
regulator etc.
- AVSS, DVSS, VSSL, VSSR, VREFLL, VREFLR must be connected to the same analog ground plane.
- When AOUT drives a capacitive load, some resistance should be connected in series between AOUT and
the capacitive load.
- All input pins except pull-down/pull-up pins should not be allowed to float.
Figure 36. Typical Connection Diagram (AVDD=3.3V, VDDL/R = 5.0V, DVDD=3.3V, Serial control mode)
MS1560-E-02
- 55 -
2014/04