AK4495EQ Datasheet, PDF (32/63 Pages) Asahi Kasei Microsystems – Quality-oriented Premium 32-Bit 2ch DAC

[AK4495S/95]
■ Audio Interface Format
[1] PCM Mode
Data is shifted in via the SDATA pin using BICK and LRCK inputs. Eight data formats are supported and
selected by the DIF2-0 pins (Parallel control mode) or DIF2-0 bits (Serial control mode) as shown in Table 18.
In all formats the serial data is MSB-first, 2's compliment format and is latched on the rising edge of BICK.
Mode 2 can be used for 20-bit and 16-bit MSB justified formats by zeroing the unused LSBs.
Mode
0
1
2
3
4
5
6
7
DIF2
0
0
0
0
1
1
1
1
DIF1
0
0
1
1
0
0
1
1
DIF0
Input Format
BICK
0
16-bit LSB justified  32fs
1
20-bit LSB justified  48fs
0
24-bit MSB justified  48fs
1
24-bit I²S compatible  48fs
0
24-bit LSB justified  48fs
1
32-bit LSB justified  64fs
0
32-bit MSB justified 64fs
1
32-bit I²S compatible  64fs
Table 18. Audio Interface Format
Figure
Figure 9
Figure 10
Figure 11
Figure 12
Figure 10
Figure 13
Figure 14
Figure 15
(default)
LRCK
BICK
(32fs)
SDATA
Mode 0
BICK
(64fs)
SDATA
Mode 0
01
10 11 12 13 14 15 0 1
10 11 12 13 14 15 0 1
15 14
01
6 5 4 3 2 1 0 15 14
14 15 16 17
31 0 1
6 5 4 3 2 1 0 15 14
14 15 16 17
31 0 1
Don’t care
15 14
0 Don’t care
15 14
0
15:MSB, 0:LSB
Lch Data
Figure 9. Mode 0 Timing
Rch Data
LRCK
BICK
(64fs)
SDATA
Mode 1
SDATA
Mode 4
01
8 9 10 11 12
31 0 1
8 9 10 11 12
Don’t care
19
0 Don’t care
19
19:MSB, 0:LSB
Don’t care 23 22 21 20 19
0 Don’t care 23 22 21 20 19
23:MSB, 0:LSB
Lch Data
Rch Data
Figure 10. Mode 1/4 Timing
31 0 1
0
0
MS1560-E-02
- 32 -
2014/04