AK5730 Datasheet, PDF (5/50 Pages) Asahi Kasei Microsystems – 4-Channel Differential Audio ADC for Line & Mic Inputs

[AK5730]
No. Pin Name
28 CN2
29 NC
30 VSS2
31 DVDD
32 CN1
33 CP1
34 CVP1
35 NC
36 MPWR
I/O
Function
Negative Charge Pump Capacitor Terminal Pin 2
Connect to CP2 with a 2.2μF capacitor that should have the low ESR (Equivalent Series
Resistance) over all temperature range. When this capacitor has the polarity, the positive
I
polarity pin should be connected to the CP2 pin. Non polarity capacitors can also be
used.
* The maximum bias voltage of this pin is 7.2V. The capacitance variation of an external
capacitor should be in the range of 2.2μF +20% and -40% including the difference by a
tolerance, a rate of temperature change and a bias voltage.
- This pin should be connected to VSS1.
- Digital Ground Pin and Charge Pump Ground Pin , 0V
Digital Power Supply Pin and Charge Pump Circuit Positive Power Supply Pin 3.0V∼3.6V
- Normally connected to VSS2 with a 0.1μF ceramic capacitor in parallel with a 10μF
electrolytic cap.
Positive Charge Pump Capacitor Terminal Pin 1
Connect to CN1 with a 2.2μF capacitor that should have the low ESR (Equivalent Series
Resistance) over all temperature range. When this capacitor has the polarity, the positive
I
polarity pin should be connected to the CN1 pin. Non polarity capacitors can also be
used.
* The maximum bias voltage of this pin is 3.6V. The capacitance variation of an external
capacitor should be in the range of 2.2μF +20% and -40% including the difference by a
tolerance, a rate of temperature change and a bias voltage.
Negative Charge Pump Capacitor Terminal Pin 1
Connect to CP1 with a 2.2μF capacitor that should have the low ESR (Equivalent Series
Resistance) over all temperature range. When this capacitor has the polarity, the positive
I
polarity pin should be connected to the CP1 pin. Non polarity capacitors can also be
used.
* The maximum bias voltage of this pin is 3.6V. The capacitance variation of an external
capacitor should be in the range of 2.2μF +20% and -40% including the difference by a
tolerance, a rate of temperature change and a bias voltage.
Charge Pump Circuit Positive Voltage Output Pin 1
Connect to VSS2 with a 2.2μF capacitor that should have the low ESR (Equivalent Series
Resistance) over all temperature range. When this capacitor has the polarity, the positive
O
polarity pin should be connected to the VSS2 pin. Non polarity capacitors can also be
used.
* The maximum bias voltage of this pin is 7.2V. The capacitance variation of an external
capacitor should be in the range of 2.2μF +20% and -40% including the difference by a
tolerance, a rate of temperature change and a bias voltage.
- This pin should be connected to VSS1.
MIC Power Supply Pin
Normally connected to VSS1 with a 1μF ceramic capacitor.
O * The maximum bias voltage of this pin is 10V. The capacitance variation of an external
capacitor should be in the range of 1μF +20% and -40% including the difference by a
tolerance, a rate of temperature change and a bias voltage.
Rev 0.8
2013/06
-5-