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AK5730 Datasheet, PDF (26/50 Pages) Asahi Kasei Microsystems – 4-Channel Differential Audio ADC for Line & Mic Inputs | |||
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[AK5730]
â System Reset
The AK5730 should be reset once by bringing the PDN pin = âLâ upon power-up. The AK5730 is powered up and the
internal timing starts clocking by LRCK âââ after exiting the power down state of reference voltage (such as VCOM) by
MCLK. In slave mode, the AK5730 is in power-down mode until MCLK and LRCK are input. In master mode, the
AK5730 is in power-down mode until MCLK is input. Following all clock inputs, set RSTN bit to â1â after setting
microphone bias voltage (MBS3-0 bits).
â Digital Attenuator
The AK5730 has a channel-independent digital attenuator (256 levels, 0.5dB step). Attenuation level of each channel can
be set by each the ATT7-0 bits (Table 7).
ATT7-0
00H
01H
:
FEH
FFH
Attenuation Level
+12dB
+11.5dB
:
0dB(default)
-0.5dB
-1.0dB
:
-115.0dB
MUTE (-â)
Table 7. Attenuation level of digital attenuator
Transition time between set values of ATT7-0 bits can be selected by ATS1-0 bits (Table 8). Transition between set
values is the soft transition in Mode1/2/3 eliminating a switching noise in the transition.
Mode
0
1
2
3
ATS1
0
0
1
1
ATS0
0
1
0
1
ATT speed
3712/fs
928/fs
1856/fs
7424/fs
(default)
Table 8. Transition Time between Set Values of ATT7-0 bits
The transition between set values is a soft transition of 3712 levels in mode 0. It takes 3712/fs (77.3ms@fs=48kHz) from
00H(0dB) to FFH(MUTE). If the PDN pin goes to âLâ, the ATTs are initialized to 00H. The ATTs also become 00H
when RSTN bit = â0â, and fade to their current value when RSTN bit returns to â1â.
Rev 0.8
- 26 -
2013/06
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