AK5730 Datasheet, PDF (33/50 Pages) Asahi Kasei Microsystems – 4-Channel Differential Audio ADC for Line & Mic Inputs

RSTN
Cycle
Error Event
Monitor Bit
INT
READ(uP)
INTR
No rmal
(1)
Fault
(4)
Normal
(2)
Err or Handling
write “1”
(3)
[AK5730]
Figure 32 Error Detection timing
Notes:
(1) Execute error detection from 1ch to 8ch (IN1P~IN4P, IN1N~IN4N pins) in this order.
(2) After the error detection from 1ch to 8ch, the error detection results are ORed and reflected to INT pins. Indication
of INT pins can be masked by MSHTV*, MSHTG*, MSHTD*, MOPEN* (*: 1-4) bits (Address= 0C-0FH).
(3) Error monitor registers are reset by setting INTR bit to “1” after all error conditions are removed.
(4) When the detected error is due to over-temperature or over-current, restart the AK5730 by the PDN pin or RSTN
bit.
Rev 0.8
- 33 -
2013/06