AK4390 Datasheet, PDF (4/32 Pages) Asahi Kasei Microsystems – Ultra Low Latency 32-Bit ΔΣ DAC

[AK4390]
PIN/FUNCTION
No. Pin Name
I/O
Function
Soft Mute in Parallel Control Mode
SMUTE
1
I
When this pin goes to “H”, soft mute cycle is initiated.
When returning to “L”, the output mute releases.
CSN
I Chip Select in Serial Control Mode
TST1
2
CAD0
I Test Pin in Parallel Control Mode
I Chip Address 0 in Serial Control Mode
(Internal pull-down pin)
(Internal pull-down pin)
DEM0
3
CCLK
I De-emphasis Enable 0 in Parallel Control Mode
I Control Data Clock in Serial Control Mode
DEM1
4
CDTI
I De-emphasis Enable 1 in Parallel Control Mode
I Control Data Input in Serial Control Mode
DIF0
5
CAD1
I Digital Input Format 0 in PCM Mode
I Chip Address 1 in Serial Control Mode
DIF1
6
DZFL
I Digital Input Format 1 in PCM Mode
O Left Channel Zero Input Detect in Serial Control Mode
7 DIF2
I Digital Input Format 2 in PCM Mode
8 PSN
Parallel/Serial Select
(Internal pull-up pin)
I
“L”: Serial Control Mode, “H”: Parallel Control Mode
TST2
9
Test pin in Parallel Control Mode.
I
Connect to GND.
DZFR
O Rch Zero Input Detect in Serial Control Mode
10 AOUTRP
O Right Channel Positive Analog Output
11 AOUTRN
O Right Channel Negative Analog Output
12 VSS1
- Connected to VSS2/3/4 Ground
13 VDDR
- Right Channel Analog Power Supply, 4.75~5.25V
14 VREFHR
I Right Channel High Level Voltage Reference Input
15 VREFLR
I Right Channel Low Level Voltage Reference Input
16 VREFLL
I Left Channel Low Level Voltage Reference Input
17 VREFHL
I Left Channel High Level Voltage Reference Input
18 VDDL
- Left Channel Analog Power Supply, 4.75~5.25V
19 VSS2
- Ground (connected to VSS1/3/4 ground)
20 AOUTLN
O Left Channel Negative Analog Output
21 AOUTLP
O Left Channel Positive Analog Output
22 VSS3
- Ground (connected to VSS1/2/4 ground)
23 AVDD
- Analog Power Supply, 4.75 to 5.25V
24 MCLK
I Master Clock Input
25 VSS4
- Connected to VSS1/2/3 Ground
26 DVDD
- Digital Power Supply, 4.75 ∼ 5.25V
Power-Down Mode
27 PDN
I
When at “L”, the AK4390 is in power-down mode and is held in reset.
The AK4390 should always be reset upon power-up.
28 BICK
I Audio Serial Data Clock in PCM Mode
29 SDATA
I Audio Serial Data Input in PCM Mode
30 LRCK
I L/R Clock in PCM Mode
Note: All input pins except internal pull-up/down pins should not be left floating.
MS1046-E-00
-4-
2009/01