AK4390 Datasheet, PDF (25/32 Pages) Asahi Kasei Microsystems – Ultra Low Latency 32-Bit ΔΣ DAC

[AK4390]
Addr Register Name
01H Control 2
Default
D7
D6
D5
D4
D3
D2
D1
D0
DZFE DZFM
SD
0
0
DEM1 DEM0 SMUTE
0
0
0
0
0
0
1
0
SMUTE: Soft Mute Enable
0: Normal Operation (default)
1: DAC outputs soft-muted.
DEM1-0: De-emphasis Response (Table 5)
Initial value is “01” (OFF).
SD:
Short Delay Filter Enable
0: Sharp roll-off filter (default)
1: Short Delay filter
DZFM:
Data Zero Detect Mode
0: Channel Separated Mode (default)
1: Channel AND’ed Mode
If the DZFM bit is set to “1”, the DZF pins of both channels goes to “H” only when the input data for
both channels are continuously zero for 8192 LRCK cycles.
DZFE:
Data Zero Detect Enable
0: Disable (default)
1: Enable
The zero detect function can be disabled by DZFE bit “0”. In this case, the DZF pins of both channels are
always “L”.
MS1046-E-00
- 25 -
2009/01