AK4569 Datasheet, PDF (39/45 Pages) Asahi Kasei Microsystems – 20-Bit Stereo CODEC with IPGA & HP-AMP

ASAHI KASEI
[AK4569]
1. Grounding and Power Supply Decoupling
The AK4569 requires careful attention to power supply and grounding arrangements. AVDD is usually supplied from the
analog power supply in the system and DVDD is supplied from AVDD via a 10Ω resistor. Alternatively if AVDD,
DVDD and HVDD are supplied separately, the power up sequence is not critical. AVSS, DVSS and HVSS must be
connected to the analog ground plane. System analog ground and digital ground should be connected together near to
where the supplies are brought onto the printed circuit board. Decoupling capacitors should be as close to the AK4569 as
possible, with the small value ceramic capacitors being the nearest.
2. Internal Voltage Reference
Internal voltage reference is output on the VREF pin (typ. 2.1V). An electrolytic capacitor 4.7µF in parallel with a 0.1µF
ceramic capacitor is attached between VREF and AVSS to eliminate the effects of high frequency noise. VCOM is
1.25V(typ) and is a signal ground of this chip. A 2.2µF electrolytic capacitor in parallel with a 0.1µF ceramic capacitor
should be connected between VCOM and AVSS to eliminate the effects of high frequency noise. A ceramic capacitor
should be connected to VCOM pin and located as close as possible to the AK4569. No load current may be drawn from
VREF and VCOM pins. All signals, especially clocks, should be kept away from the VCOM and VREF pins in order to
avoid unwanted coupling into the AK4569.
3. Analog Inputs
The analog inputs are single-ended and the input resistance 50kΩ (typ) for AINL1/AINR1 pins and 12.5kΩ (typ) for
AINL2/AINR2 pins. The input signal range is 1.5Vpp centered on VCOM voltage. Usually, the input signal cuts DC with
a capacitor. The cut-off frequency is fc=(1/2πRC). The AK4569 can accept input voltages from AVSS to AVDD. The
ADC output data format is 2’s complement. The ADC’s DC offset is removed by the internal HPF
(fc=3.4Hz@fs=44.1kHz).
4. Analog Outputs
The analog outputs are single-ended outputs and 1.5Vpp(typ) centered on the VCOM voltage. The input data format is 2’s
compliment. The output voltage is a positive full scale for 7FFFFH(@20bit) and negative full scale for 80000H(@20bit).
The ideal output is VCOM voltage for 00000H(@20bit). If the noise generated by the delta-sigma modulator beyond the
audio band causes problems, attenuation by an external filter is required.
DC offsets on the analog outputs is eliminated by AC coupling since the analog outputs have a DC offset equal to VCOM
plus a few mV.
MS0292-E-01
- 39 -
2005/07