AK8411 Datasheet, PDF (21/25 Pages) Asahi Kasei Microsystems – Single Channel Input, 16 Bit 5 MSPS Video ADC

ASAHI KASEI
[AK8411]
CDS
Black
correction
PGA
00h
80h
FFh
offset DAC setting
ADC
min.
max.
CIS signal (CCD type ) CDS output level after Black correction
Output code
Fig. 24 Level Changes by Offset Setting
(in CDS Mode operation = Negative Polarity operation)
Offset DAC Output is added to the sampled & held signal level. Both in DC Direct-Coupled
Mode operation (Positive Polarity) and in CDS Mode operation (Negative Polarity), when
setting code to the Offset DAC is smaller, the ADC Output code becomes smaller, and when
it is larger, the ADC Output code becomes larger.
„ R2h PGA Gain setting
Gain(x) = ^1.98 × ⁸⁰ [times]
2.0 16 + (63 − x)
(x=0~63) where x is a register setting value.
At reset, x=0 then Gain (0) = 1.0 time.
5
0.5
4
0.4
3
0.3
2
0.2
1
0.1
0
0
0
16
32
48
64
Register setting[DEC]
Gain[times]
Step[times]
15
12
9
6
3
0
0
16
32
48
Register setting[DEC]
1
0.8
0.6
0.4
0.2
0
64
Gain[dB]
Step[dB]
MS0457-E-00
Fig. 25 Gain curves (theoretical values)
21
2006/05