PROASIC3E Datasheet, PDF (3/37 Pages) Actel Corporation – I/O Structures in IGLOOe and ProASIC3E Devices

I/O Structures in IGLOOe and Pro ASIC3E Devices
Pro I/Os—IGLOOe, ProASIC3EL, and ProASIC3E
Table 2 shows the voltages and compatible I/O standards for Pro I/Os. I/Os provide programmable
slew rates, drive strengths, and weak pull-up and pull-down circuits. All I/O standards, except 3.3 V
PCI and 3.3 V PCI-X, are capable of hot-insertion. 3.3 V PCI and 3.3 V PCI-X are 5 V–tolerant. See the
"5 V Input Tolerance" section on page 20 for possible implementations of 5 V tolerance. Single-
ended input buffers support both the Schmitt trigger and programmable delay options on a per–
I/O basis.
All I/Os are in a known state during power-up, and any power-up sequence is allowed without
current impact. Refer to the "I/O Power-Up and Supply Voltage Thresholds for Power-On Reset
(Commercial and Industrial)" section in the datasheet for more information. During power-up,
before reaching activation levels, the I/O input and output buffers are disabled while the weak
pull-up is enabled. Activation levels are described in the datasheet.
Table 2 • Supported I/O Standards
A3PE600
A3PE1500
A3PE3000/
A3PE3000L
AGLE600
AGLE1500 AGLE3000
Single-Ended
LVTTL/LVCMOS 3.3 V, LVCMOS 2.5 V / 1.8 V / 1.5 V,
✓
✓
✓
LVCMOS 2.5/5.0 V, 3.3 V PCI/PCI-X
Differential
LVPECL, LVDS, B-LVDS, M-LVDS
✓
✓
✓
Voltage-Referenced
GTL+ 2.5 V / 3.3 V, GTL 2.5 V / 3.3 V, HSTL Class I
✓
✓
✓
and II, SSTL2 Class I and II, SSTL3 Class I and II
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