PROASIC3E Datasheet, PDF (14/37 Pages) Actel Corporation – I/O Structures in IGLOOe and ProASIC3E Devices

I/O Structures in IGLOOe and ProASIC3E Devices
B-LVDS/M-LVDS
Bus LVDS (B-LVDS) refers to bus interface circuits based on LVDS technology. Multipoint LVDS
(M-LVDS) specifications extend the LVDS standard to high-performance multipoint bus
applications. Multidrop and multipoint bus configurations may contain any combination of drivers,
receivers, and transceivers. Actel LVDS drivers provide the higher drive current required by B-LVDS
and M-LVDS to accommodate the loading. The driver requires series terminations for better signal
quality and to control voltage swing. Termination is also required at both ends of the bus, since the
driver can be located anywhere on the bus. These configurations can be implemented using
TRIBUF_LVDS and BIBUF_LVDS macros along with appropriate terminations. Multipoint designs
using Actel LVDS macros can achieve up to 200 MHz with a maximum of 20 loads. A sample
application is given in Figure 9. The input and output buffer delays are available in the LVDS
sections in the datasheet.
Example: For a bus consisting of 20 equidistant loads, the terminations given in EQ 1 provide the
required differential voltage, in worst case industrial operating conditions, at the farthest receiver:
R_S = 60 Ω, R_T = 70 Ω, given Z_O = 50 Ω (2") and Z_stub = 50 Ω (~1.5").
EQ 1
Receiver
EN
R
+-
Transceiver
EN
T
+-
Driver
D EN
+
-
Receiver
EN
R
+-
Transceiver
EN
T
+-
BIBUF_LVDS
R_S R_S
R_S R_S
R_S R_S
R_S R_S
R_S R_S
Z_stub
Z₀
Z_stub Z_stub
Z₀
Z_stub Z_stub
Z₀
Z_stub Z_stub
Z₀
Z_stub
...
Z_stub
Z₀
Z_stub
Z₀
R_T
Z₀
Z₀
Z₀
Z₀
Z₀
R_T
Z₀
Figure 9 • A B-LVDS/M-LVDS Multipoint Application Using LVDS I/O Buffers
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