PROASIC3E Datasheet, PDF (11/37 Pages) Actel Corporation – I/O Structures in IGLOOe and ProASIC3E Devices

I/O Standards
I/O Structures in IGLOOe and Pro ASIC3E Devices
Single-Ended Standards
These I/O standards use a push-pull CMOS output stage with a voltage referenced to system ground
to designate logical states. The input buffer configuration, output drive, and I/O supply voltage
(V_CCI) vary among the I/O standards (Figure 6).
V_{CCI OUT}
Device 1
GND
IN
V_CCI
Device 2
GND
Figure 6 • Single-Ended I/O Standard Topology
The advantage of these standards is that a common ground can be used for multiple I/Os. This
simplifies board layout and reduces system cost. Their low-edge-rate (dv/dt) data transmission
causes less electromagnetic interference (EMI) on the board. However, they are not suitable for
high-frequency (>200 MHz) switching due to noise impact and higher power consumption.
LVTTL (Low-Voltage TTL)
This is a general-purpose standard (EIA/JESD8-B) for 3.3 V applications. It uses an LVTTL input buffer
and a push-pull output buffer. The LVTTL output buffer can have up to six different programmable
drive strengths. The default drive strength is 12 mA. V_CCI is 3.3 V. Refer to "I/O Programmable
Features" on page 15 for details.
LVCMOS (Low-Voltage CMOS)
The low-power flash devices provide four different kinds of LVCMOS: LVCMOS 3.3 V, LVCMOS 2.5 V,
LVCMOS 1.8 V, and LVCMOS 1.5 V. LVCMOS 3.3 V is an extension of the LVCMOS standard (JESD8-B–
compliant) used for general-purpose 3.3 V applications. LVCMOS 2.5 V is an extension of the
LVCMOS standard (JESD8-5–compliant) used for general-purpose 2.5 V applications. LVCMOS 2.5 V
for the 30 k gate devices has a clamp diode to V_CCI, but for all other devices there is no clamp
diode.
There is yet another standard supported by IGLOO and ProASIC3 devices (except A3P030): LVCMOS
2.5/5.0 V. This standard is similar to LVCMOS 2.5 V, with the exception that it can support up to
3.3 V on the input side (2.5 V output drive).
LVCMOS 1.8 V is an extension of the LVCMOS standard (JESD8-7–compliant) used for general-
purpose 1.8 V applications. LVCMOS 1.5 V is an extension of the LVCMOS standard (JESD8-11–
compliant) used for general-purpose 1.5 V applications.
The V_CCI values for these standards are 3.3 V, 2.5 V, 1.8 V, and 1.5 V, respectively. All these versions
use a 3.3 V–tolerant CMOS input buffer and a push-pull output buffer. Like LVTTL, the output
buffer has up to seven different programmable drive strengths (2, 4, 6, 8, 12, 16, and 24 mA). Refer
to "I/O Programmable Features" on page 15 for details.
3.3 V PCI (Peripheral Component Interface)
This standard specifies support for both 33 MHz and 66 MHz PCI bus applications. It uses an LVTTL
input buffer and a push-pull output buffer. With the aid of an external resistor, this I/O standard
can be 5 V–compliant for low-power flash devices. It does not have programmable drive strength.
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