Z8F042AHJ020SG Datasheet, PDF (97/282 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F082A Series
Product Specification
80
5. Enable the timer interrupt, if appropriate and set the timer interrupt priority by writing
to the relevant interrupt registers. By default, the timer interrupt is generated for both
input capture and reload events. If appropriate, configure the timer interrupt to be gen-
erated only at the input capture event or the reload event by setting TICONFIG field
of the TxCTL0 Register.
6. Configure the associated GPIO port pin for the Timer Input alternate function.
7. Write to the Timer Control Register to enable the timer and initiate counting.
In CAPTURE Mode, the elapsed time from timer start to Capture event can be calculated
using the following equation:
Capture Elapsed Time (s) = -^--^C----^a---^p---^t--^u---^r-^e-----^V----^a---^l-^u---^e----^–-----^S----^t-^a---^r--^t---^V----^a---^l-^u---^e---^----^----^P---^r--^e---^s---^c---^a---^l-^e-
System Clock Frequency (Hz)
CAPTURE RESTART Mode
In CAPTURE RESTART Mode, the current timer count value is recorded when the
acceptable external Timer Input transition occurs. The Capture count value is written to
the Timer PWM High and Low Byte registers. The timer input is the system clock. The
TPOL bit in the Timer Control Register determines if the Capture occurs on a rising edge
or a falling edge of the Timer Input signal. When the Capture event occurs, an interrupt is
generated and the count value in the Timer High and Low Byte registers is reset to 0001H
and counting resumes. The INPCAP bit in TxCTL0 Register is set to indicate the timer
interrupt is because of an input capture event.
If no Capture event occurs, the timer counts up to the 16-bit Compare value stored in the
Timer Reload High and Low Byte registers. Upon reaching the reload value, the timer
generates an interrupt, the count value in the Timer High and Low Byte registers is reset to
0001H and counting resumes. The INPCAP bit in TxCTL0 Register is cleared to indicate
the timer interrupt is not caused by an input capture event.
Observe the following steps for configuring a timer for CAPTURE RESTART Mode and
initiating the count:
1. Write to the Timer Control Register to:
– Disable the timer
– Configure the timer for CAPTURE RESTART Mode by writing the TMODE bits
in the TxCTL1 Register and the TMODEHI bit in TxCTL0 Register
– Set the prescale value
– Set the Capture edge (rising or falling) for the Timer Input
2. Write to the Timer High and Low Byte registers to set the starting count value (typi-
cally 0001H).
PS022827-1212
PRELIMINARY
Operation