Z8F042AHJ020SG Datasheet, PDF (236/282 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F082A Series
Product Specification
219
Assembly
Mnemonic
RRC dst
Table 128. eZ8 CPU Instruction Summary (Continued)
Symbolic Operation
D7 D6 D5 D4 D3 D2 D1 D0
C
dst
Address
Mode
dst src
Opcode(s)
Flags
Fetch Instr.
Cycle Cycle
(Hex) C Z S V D H s
s
R
C0
* * * *–– 2
2
IR
C1
2
3
SBC dst, src dst  dst – src - C
r
r
32
****1* 2
3
r
Ir
33
2
4
R
R
34
3
3
R IR
35
3
4
R IM
36
3
3
IR IM
37
3
4
SBCX dst, src dst  dst – src - C
ER ER
38
****1* 4
3
ER IM
39
4
3
SCF
C1
DF 1 – – – – – 1
2
SRA dst
D7 D6 D5 D4 D3 D2 D1 D0
dst
R
C _IR
D0
* * *0–– 2
2
D1
2
3
SRL dst
0
D7 D6 D5 D4 D3 D2 D1 D0
C
R
dst
IR
1F C0 * * 0 * – – 3
2
1F C1
3
3
SRP src
RP  src
IM
01
–––––– 2
2
STOP
STOP Mode
6F
–––––– 1
2
Note: Flags Notation:
* = Value is a function of the result of the operation.
– = Unaffected.
X = Undefined.
0 = Reset to 0.
1 = Set to 1.
PS022827-1212
PRELIMINARY
eZ8 CPU Instruction Summary